S1F75510 Epson Electronics America, Inc., S1F75510 Datasheet - Page 3

• Manufacturer Part Number: S1F75510
• Description: Charge-pump Dc/dc Converter & Voltage Regulator
• Manufacturer: Epson Electronics America, Inc.

Rev. 1.1
DESCRIPTIONS FOR THE BLOCK DIAGRAM
(1) CR oscillation circuit
The oscillation circuit is constituted by connecting a resistor between the OSC1 pin and the OSC2 pin. The
clock signals being generated by this oscillation circuit will become effective as boosting clock signals while the
mode changeover signal MODE is on the V
is on the V
V
OSCSEL is set to the V
(2) Mode changeover circuit
The operation modes of the boosting circuit and voltage stabilizing circuit are being switched over by the mode
changeover signal MODE. Also, it selects the clock signals to feed to the timing signal forming circuit from
either of the external clock signals or internal clock signals.
(3) Timing signal forming circuit
This circuit generates the charge pump boosting clock signals. This circuit outputs timing signals of the clock
type (internal clock or external clock) having been selected by the mode changeover circuit to drive respective
boosting circuits. When the shut down signal POFFX is set to the V
the boosting operation.
(4) 2 boosting circuit in the positive direction
This circuit makes 2 boosting in the positive direction by charge pump boosting upon the inputted supply
voltage V
voltage stabilizing circuit.
(5) Voltage stabilizing circuit
This circuit generates the positive supply voltage V
reference, this circuit stabilizes the output from the above "(4) 2 boosting circuit in the positive direction" by
use of the series regulator.
(6) 3 boosting circuit in the positive direction
This circuit generates the positive supply voltage V
the positive direction by charge pump boosting upon the voltage V
reference voltage.
(7) 3 boosting circuit in the negative direction
This circuit generates the negative supply voltage V
the negative direction by charge pump boosting upon the voltage V
reference voltage.
(8) Electric charge discharging circuit
This circuit discharges the electric charge remaining in the V
circuit will work when the POFFX pin is set to the V
DD
level (blank mode · internal clock). When the MODE is set to the V
DD
SS
– V
level and, at the same time, when the internal/external clock selection signal OSCSEL is on the
SS
using the V
SS
level (blank mode · external clock), the oscillation will be interrupted.
SS
potential as the reference voltage. The 2 boosted output will enter into the
DD
level (normal mode) or while the mode changeover signal MODE
OUT3
SS
OUT4
OUT2
level.
for the gate driver. This circuit effects 3 boosting in
for the gate driver. This circuit effects 3 boosting in
for the source driver. ON the basis of the built-in
OUT3
OUT2
SS
OUT2
pin and V
SS
level, the timing signal stops to interrupt
– V
– V
level and, at the same time, when the
SS
SS
using the V
OUT4
using the V
pin to the V
OUT2
S1F75510
SS
potential as the
potential as the
SS
level. This
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