S1F76610M2E Epson Electronics America, Inc., S1F76610M2E Datasheet - Page 25

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S1F76610M2E

Manufacturer Part Number
S1F76610M2E
Description
Dc-dc Converter With High Efficiency And Low Power Consumption.
Manufacturer
Epson Electronics America, Inc.
Datasheet

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S1F76610M2E Technical Manual (Rev.1.1)
Note 1) <Notes on load connection>
Note 2) In Fig.8.5, the first stage is assigned to double boosting and the next-stage to triple boosting; however,
Note 3) When double boosting is provided in the first stage, the first-stage CAP1- output can be used as a
Note 4) In serial connection, the temperature gradient is provided to the V
As shown in Fig.8.5, when connecting load between V
serial connection, take care of the following points:
When the IC is activated or no normal output is generated at the V
signal, current is supplied from V
If the voltage exceeds the absolute maximum rating above V
normal operation. For serial connection, as shown in Fig.8.5, connect diode D1 between V
V
triple boosting is available for both the first and next stages unless the input voltage V
next stage exceeds the standard value (6V). For serial connection, each IC must be designed in
conformity with the standard (V
next-stage clock; however, when triple boosting is provided, it cannot be used as a next-stage clock.
Therefore, to obtain a next-stage clock, mount R
As shown in Table 5.1, the next-stage external clock operation by the pre-stage CAP1- output is
available only for temperature gradient C
use an internal oscillator like the above.
Fig.8.7) of the IC in which the stabilizer is active. The V
temperature as follows:
REG
V
V
V
DD
I
O
so that the voltage above V
V
REG
=
|
V
REG
T
Fig.8.7 Power system in serial connection
|
First stage
=
C
T
DD
(V
Max. 6V
DD
DD
DD
- V
’ is not applied to the V
(or other voltage above V
'
I
V
≤ 6V, V
Next stage
REG
T
= -0.5%/ ° C. If another temperature gradient is required,
EPSON
)(25
V
V
DD
OSC
DD
I
- V
in the external side and use an internal oscillator.
))
O
DD
≤ 18V). (See Fig.8.7.)
V
O
(or other voltage above V
8. APPLIED-CIRCUIT EXAMPLES
REG
DD
REG
DD
pin.
’) to the V
DD
’ at the V
value changes depending on the
REG
- V
REG
pin like V
REG
REG
voltage (V
pin through the load.
pin, the IC may fail
V
REG
REG
DD
DD
’) and V
by the XP
DD
’ - V
’ - V
I
’ in the
REG
REG
I
’ and
OFF
in
in
21

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