IRS2166D International Rectifier Corp., IRS2166D Datasheet

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IRS2166D

Manufacturer Part Number
IRS2166D
Description
Pfc And Ballast Control Ic In A 16-lead Soic Package
Manufacturer
International Rectifier Corp.
Datasheet

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www.irf.com
Features
Description
The IRS2166D is a fully integrated, fully protected 600 V
ballast control IC designed to drive all types of fluorescent
lamps. The IRS2166D is based on the popular IR2166
control IC with additional improvements to increase ballast
performance. PFC circuitry operates in critical conduction
mode and provides high PF, low THD, and DC bus
regulation. The IRS2166D features include programmable
preheat and run frequencies, programmable preheat time,
and programmable end-of-life protection. Comprehensive
protection features such as protection from failure of a lamp
to strike, filament failures, end-of-life protection, DC bus
undervoltage reset as well as an automatic restart function,
have been included in the design.
Application Diagram (Typical Only)
GND
L
N
PFC, ballast control and 600 V half-bridge driver in one IC
Critical-conduction mode boost-type PFC
Programmable half-bridge over-current protection
Programmable preheat frequency
Programmable deadtime
Programmable preheat time
Programmable run frequency
RoHS compliant
F1
L1
CY
RV1
C1
Note: Thick traces represent high-frequency, high-current paths.
noise problems.
BR1
C2
Lead lengths should be minimized and power and IC grounds should be separated to avoid high-frequency
LPFC
MPFC
RPFC
DPFC
CBUS
CT
RVDC
CVDC
RT
DCOMP
CPH
CCOMP
RZX
RPH
RBUS
VBUS
COMP
CPH
RPH
PFC
RT
CT
ZX
1
2
3
4
5
6
7
8
IC BALLAST
PFC + BALLAST CONTROL IC
System Features
Packages
16
15
14
13
12
11
10
9
CCS
SD/EOL
VCC
COM
HO
VS
VB
LO
CS
CVCC1
End-of-life window comparator pin
Internal up/down current-sense fault counter
DC bus undervoltage reset
Lamp removal/auto-restart shutdown pin
Internal bootstrap MOSFET
Internal 15.6 V zener clamp diode on V
Micropower startup (250 µA)
Latch immunity and ESD protection
Improved V
Increased SD pin shutdown voltage threshold hysteresis
Changed EOL pin internal 2.0 V bias to a +/-10 µA OTA
Internal bootstrap MOSFET
CBOOT
CSD1
DSD
IRS2166DPbF
16-Lead PDIP
CVCC2
IRS2166D(S)PbF
CSD2
RLIM
RL
O
RH
O
BUS
regulation voltage tolerance
ML
S
RCS
MHS
RSD
RSUPPLY
Data Sheet No. PD60292
DCP2
RPU
CSNUB
DCP1
LRES
IRS2166DSPbF
16-Lead SOIC
CEOL
RDC
CDC
REOL4
REOL1
REOL3
CC
REOL2
Page 1
CRES

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IRS2166D Summary of contents

Page 1

... Programmable preheat time Programmable run frequency RoHS compliant Description The IRS2166D is a fully integrated, fully protected 600 V ballast control IC designed to drive all types of fluorescent lamps. The IRS2166D is based on the popular IR2166 control IC with additional improvements to increase ballast performance. PFC circuitry operates in critical conduction mode and provides high PF, low THD, and DC bus regulation ...

Page 2

... V . CLAMP www.irf.com Definition (16-Pin DIP) ≤ +25 ºC A (16-Pin SOIC) θJA (16-Pin DIP) (16-Pin SOIC) and COM which has a nominal breakdown CC Definition pin to keep the internal 15.6 V zener clamp diode on this pin CC IRS2166D(S)PbF Min. Max. Units -0.3 625 V – 0 0 0.3 V ...

Page 3

... IRS2166D(S)PbF = R = 39.2 kΩ PFC Max Units Test Conditions V rising from 13 COM V V falling from 11 COM 3 COM 500 µ COM CC 5 COM 900 µ ...

Page 4

... LO goes low --- 450 1.8 2.0 --- 10 --- 10 2.7 3.0 0.9 1.0 until LO goes low --- 1 --- 0 --- 0 IRS2166D(S)PbF =0 39.2 kΩ Max Units Test Conditions 3.3 V CT=COM --- V --- CC 220 ns 100 --- mA --- --- V --- C =0.1 µ --- V = kHz MODE=PREHEAT MODE=RUN, 46 CPH=13 V --- % 1 ...

Page 5

... Fault R Counter Fault S Q Logic R1 RUN VCC UVLO OVP 4.3 V RS2 IRS2166D(S)PbF VCC Bootstrap Control Driver Logic High- Side Driver Low- Side Driver 1. VCC RS3 400 us ...

Page 6

... Fault Counter Enabled CPH > 12.0 V (VCPHRUN) RUN Mode RPH = Open 1/2-Bridge Oscillating @f RUN PFC = Low Gain Mode VBUS UV Threshold Enabled CS Enabled Fault Counter Disabled IRS2166D(S)PbF VCC < 10.5 V (VCCUV-) (Power Turned Off) SD/EOL > 5.0V (VSDTH+) (Lamp Removal) VBUS < 3.0 V Discharge (VBUSUV) VCC to UVLO ...

Page 7

... Half-bridge current sensing input Low-side gate driver output 12 COM IC power & signal ground VCC Logic & low-side gate driver supply 14 VB High-side gate driver floating supply SD/EOL 15 VS High voltage floating return High-side gate driver output IRS2166D(S)PbF Description Page 7 ...

Page 8

... Timing Diagrams Ballast Section VCC 15.6V UVLO+ UVLO- VCC CPH f FREQ 1.25V UVLO PH RT RPH www.irf.com PH 50 events of CS>1.25V OPEN RT RPH OPEN RPH 1.25V CS IRS2166D(S)PbF f run RUN UVLO Page 8 ...

Page 9

... IC is fully functional before the high and low side output drivers are activated. Fig. 1 shows an efficient supply voltage using the start-up current of the IRS2166D together with a charge pump from the ballast output stage (R ...

Page 10

... 1. 5uA Comp 4 CPH CPH COM 12 IRS2166D Load Return Fig.4: Ignition circuitry ). Should the voltage at the VBUS pin BUSUV will be discharged below the CC to exceed CCUV ) during run EOLTH- PH can be decreased below V - (ballast CC CCUV CC is ...

Page 11

... THD of 0% represents a pure sinewave (no distortion). For this reason it is desirable to have a high PF and a low THD. To achieve this, the IRS2166D includes an active power factor correction (PFC) circuit which, for an AC line input voltage, produces an AC line input current ...

Page 12

... The PFC control circuit of the IRS2166D (Fig. 8) only requires four control pins: VBUS, COMP, ZX and PFC. The VBUS pin is for sensing the DC bus voltage (via an external resistor voltage divider), the COMP pin programs the on-time of M and the speed of the feedback loop, ...

Page 13

... State Diagram). resistor together with the micro-power start-up CC current of the IRS2166D, determines the line input turn- on voltage. This should be set such that the ballast turns line voltage level above the undervoltage turn-off level the correct selection of the value of the ...

Page 14

... The preheat frequency is programmed with timing decreases CC resistors R and R , and timing capacitor resistors are connected in parallel internally for the duration of the preheat time. The preheat frequency is therefore given as: IRS2166D(S)PbF and The deadtime is the DT from 3 1 [s] (1) ...

Page 15

... Step 6: Calculate resistor R R SUPPLY η ⋅ 2 ⋅ ) VAC VAC MIN MIN ⋅ ⋅ P VBUS OUT [H] (1) IRS2166D(S)PbF DC bus voltage = Minimum rms AC input voltage Minimum PFC switching frequency at minimum Ballast output power ⋅ ⋅ OUT [A] η ⋅ MIN i over PK ⋅ ...

Page 16

... CaseOutlines www.irf.com IRS2166D(S)PbF Page 16 ...

Page 17

... Metric Min Max Min 329.60 330.25 12.976 20.95 21.45 0.824 12.80 13.20 0.503 1.95 2.45 0.767 98.00 102.00 3.858 n/a 22.40 n/a 18.50 21.10 0.728 16.40 18.40 0.645 IRS2166D(S)PbF Imperial Max 0.318 0.161 0.641 0.299 0.260 0.409 n/a 0.062 D A Imperial Max 13.001 0.844 0.519 0.096 4.015 0.881 0.830 0.724 Page 17 ...

Page 18

... SOIC Tape & Reel IRS2166DSTRPbF www.irf.com ORDER INFORMATION 16-Lead PDIP IRS2166DPbF 16-Lead SOIC IRS2166DSPbF This product has been designed and qualified for the industrial level. Qualification standards can be found at IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 Data and specifications subject to change without notice ...

Page 19

... I V source current when FET is on B,CAP source current when FET www.irf.com REVISION HISTORY Feb ’06 revision Min Typ Max --- 13.7 --- 30 55 --- 8 12 --- IRS2166D(S)PbF Aug ’06 revision Min Typ Max Units kHz V 13.1 13.7 --- 40 55 --- --- Page 19 ...

Page 20

... CC --- 4.5 --- 30 --- 50 --- 30 --- 30 --- 12.5 --- 500 --- --- 300 --- 6.7 --- 400 73 76 7.5 8.4 --- 50 until LO goes low --- TBD until LO goes low --- TBD 13.1 13 IRS2166D(S)PbF Sept ’06 revision Max Min Typ Max Units --- --- 250 500 --- --- 4.3 5.1 --- --- 600 900 --- --- 5.0 --- --- --- 30 70 --- --- 50 90 --- --- -45 -35 -25 --- 12.0 12.5 13.0 --- 200 300 ...

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