MB1501 Fujitsu, MB1501 Datasheet - Page 3

• Manufacturer Part Number: MB1501
• Description: SERIAL INPUT PLL FREQUENCY SYNTHESIZER
• Manufacturer: Fujitsu

PIN DESCRIPTIONS
Pin No.
10
12
13
14
11
15
16
1
2
3
4
5
6
7
8
9
Pin Name
OSC
OSC
Clock
GND
Data
V
D
FC
V
LD
LE
f
f
f
in
P
CC
P
O
r
P
R
IN
OUT
I/O
—
—
—
O
O
O
O
O
O
O
O
I
I
I
I
I
Oscillator input.
Oscillator output.
A crystal is placed between OSC
Power supply input for charge pump.
Power supply voltage input.
Charge pump output.
Phase characteristic can be inversed depending upon FC input.
Ground.
Phase comparator output.
This pin outputs high when the phase is locked. While the phase difference of f
the output level goes low.
Prescaler input.
The connection with an external VCO should be an AC connection.
Clock input for 19-bit shift register and 16-bit shift register.
Each rising edge of the clock shifts one bit of data into the shift registers.
Serial data of binary code input.
The last bit of the data is a control bit. The last data bit specifies which latch is activated.
When the last bit is high level and LE is high-level, data is transferred to 15-bit latch.
When the last bit is low level and LE is high level, data is transferred to 18-bit latch.
Load enable input (with internal pull up resistor).
When LE is high level (or open), data stored in the shift register is transferred to latch depend-
ing on the control data.
Phase selecting input of phase comparator (with internal pull up resistor). When FC is low
level, charge pump and phase detector characteristics can be inversed.
Monitor pin of phase comparator input.
It is the same as programmable reference divider output.
Monitor pin of phase comparator input.
It is the same as programmable divider output.
Outputs for external charge pump.
Phase characteristics can be inversed depending on FC input.
P pin is an N-channel open-drain output.
IN
and OSC
Descriptions
OUT
.
r
and f
MB1501
MB1501H
MB1501L
p
exists,
3