MB15F04 Fujitsu Media Devices, MB15F04 Datasheet - Page 3

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MB15F04

Manufacturer Part Number
MB15F04
Description
Dual Serial Input PLL Frequency Synthesizer
Manufacturer
Fujitsu Media Devices
Datasheet

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Pin No.
PIN DESCRIPTIONS
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
Pin name
GND
GND
LD/fout
OSCin
GND
BSC
Xfin
Xfin
Vcc
Clock
Vcc
PS
BS
Do
PS
Data
Do
fin
fin
LE
RX
TX
RX
TX
TX
TX
RX
RX
TX
TX
RX
RX1
RX2
TX
TX
I/O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Ground for RX–PLL section.
The programmable reference divider input. TCXO should be connected with a
AC coupling capacitor.
Ground for the TX-PLL section.
Prescaler input pin for the TX-PLL.
The connection with VCO should be AC coupling.
Power supply voltage input pin for the TX-PLL section.
When power is OFF, latched data of TX-PLL is cancelled.
Prescaler complimentary input for the TX-PLL section.
This pin should be grounded via a capacitor.
Analog switch output (BS
Always pull-down the BSC
BSC
BSC
Power saving mode control for the TX-PLL section. This pin must be set
at “L” Power-ON. (Open is prohibited.)
PS
PS
Charge pump output for the TX-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
Analog switch output for the TX selection.
Ground 2 for the RX section.
Charge pump output for the RX-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
Power saving mode control for the RX-PLL section. This pin must be set
at “L” Power-ON. (Open is prohibited.)
PS
PS
Lock detect signal output (LD) / phase comparator monitoring output (fout)
The output signal is selected by a LDS bit in a serial data.
LDS bit = “H” ; outputs fout signal
LDS bit = “L” ; outputs LD signal
Prescaler complimentary input for the RX-PLL section.
This pin should be grounded via a capacitor.
Power supply voltage input pin for the RX-PLL section.
When power is OFF, latched data of RX-PLL is cancelled.
Prescaler input pin for the RX-PLL.
The connection with VCO should be AC coupling.
Load enable signal input (with the schmitt trigger circuit.)
When LE is “H”, data in the shift register is transferred to the corresponding
Serial data input (with the schmitt trigger circuit.)
A data is transferred to the corresponding latch (TX-ref counter, TX-Prog.
counter, RX-ref. counter, RX-prog. counter) according to the control bit in a
serial data.
Clock input for the 23-bit shift register (with the schmitt trigger circuit.)
One bit data is shifted into the shift register on a rising edge of the clock.
latch according to the control bit in a serial data.
TX
TX
RX
RX
TX
TX
= “L” ; Power saving mode
= “H” ; Normal mode
= “H” ; Normal mode
= “L” ; Power saving mode
= “H”; outputs the Do
= “L” ; goes to high impedance.
TX
TX
) control for the TX section.
TX
pin when not using BS
state.
Descriptions
TX
. (Do not leave open.)
MB15F04
3

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