ADP3050-3.3 Analog Devices, ADP3050-3.3 Datasheet - Page 13

• Manufacturer Part Number: ADP3050-3.3
• Description: 200 Khz, 1 a Step-down High-voltage Switching Regulator
• Manufacturer: Analog Devices

to determine the total output variation. Use 1% resistors placed
close to the FB pin to prevent noise pickup.
FREQUENCY COMPENSATION
The ADP3050 uses a unique compensation scheme that allows the
use of any type of output capacitor. The designer is not limited to a
specific type of capacitor nor a specific ESR range. External compen-
sation allows the designer to optimize the loop for transient response
and system performance. The values for R
pole and zero locations for the error amplifier to compensate the
regulator loop.
For tantalum output capacitors, the typical compensation values
are R
are R
mized for all designs, but they should provide a good starting
point for selecting the final compensation values. Other types of
output capacitors will require different values of C
0.5 nF and 10 nF. Typically, the lower the ESR of the output
capacitor, the larger the value for C
capacitor ESR, output capacitance, and inductor value (due
to production tolerances, changes in operating point, changes
in temperature) will affect the loop gain and phase response.
Always check the final design over its complete operating range
to ensure proper regulator operation.
Adjusting the R
your system. Use the typical values above as a starting point, then
try increasing and decreasing each independently and observing the
transient response. An easy way to check the transient response of
the design is by observing the output while pulsing the load current
at a rate of around 100 Hz to 1 kHz. There should be some slight
ringing at the output when the load pulses, but this should not be
excessive (just a few rings). The frequency of this ringing shows
the approximate unity gain frequency of the loop. Again, always
check the design over its full operating range of input voltage,
output current, and temperature to ensure that the loop is compen-
sated correctly.
In addition to setting the zero location, R
frequency gain of the error amplifier. If this gain is too large,
output ripple voltage will appear at the COMP pin (the output
of the error amplifier) with enough amplitude to interfere with nor-
mal regulator operation. If this happens, subharmonic switching
will occur (the pulsewidth of the switch waveform will change, even
though the output voltage stays regulated). The voltage ripple at
the COMP pin should be kept below about 100 mV to prevent
this from occurring. The amount of ripple can be estimated by
the following formula, where g
ductance (g
For example: a 12 V to 5 V, 800 mA regulator with an inductor
of L = 47 µH has I
if a 100 µF tantalum output capacitor with a maximum ESR of
100 mΩ and compensation values of R
are used. The ripple voltage at the COMP pin will be:
V
V
COMP, RIPPLE
×
C
C
COMP, RIPPLE
1 20
5 0
= 4 kΩ and C
= 4 kΩ and C
.
.
m
=
= 1,250 µMho):
37 2
C
. mV
and C
=
RIPPLE
=
(
g
(
C
C
1 250 10
m
,
= 1 nF; for ceramics, the typical values
= 4.7 nF. These values may not be opti-
C
×
= 310 mA (example from earlier section);
values can optimize the compensation for
R
C
×
)
×
m
(
−
is the error amplifier transcon-
I
6
RIPPLE
× ×
4 10
C
C
. Normal variations in
= 4 kΩ and C
×
C
ESR
C
3
and C
)
also sets the high
×
)
(
0 310 0 1
×
.
V
C
V
OUT
will set the
C
FB
C
between
×
= 1 nF
.
)
(8)
If this ripple voltage were more than 100 mV, R
be decreased to prevent subharmonic switching. Typical values
for R
For output voltages greater than 5 V, it may be necessary to add a
small capacitor in parallel with R2, as shown in Figure 2. This
will improve stability and transient response. For tantalum output
capacitors, the typical value for C
capacitors, the typical value for C
CURRENT LIMIT/FREQUENCY FOLDBACK
The ADP3050 uses a cycle-by-cycle current limit to protect the
device under fault and high stress conditions. When the current
limit is exceeded, the power switch turns off until the beginning
of the next oscillator cycle. If the voltage on the feedback pin
drops below 80% of its nominal value, the oscillator frequency
starts to decrease (see TPC 15 in the Typical Performance
Characteristics section). The frequency gradually reduces to a
minimum value of around 80 kHz (this minimum occurs when
the feedback voltage falls to 30% of its nominal value). This
reduces the power dissipation in the IC, the external diode, and
the inductor during short circuit conditions. This frequency
foldback method provides complete device fault protection with-
out interfering with the normal device operation.
BIAS PIN CONNECTION
To help improve efficiency, most of the internal operating current
can be drawn from the lower voltage regulated output voltage
instead of from the input supply. For example, if the input voltage
is 24 V and the output voltage is 5 V, a quiescent current of 4 mA
will waste 96 mW if drawn from the input supply, but only 20 mW
is drawn from the regulated 5 V output. This power savings will be
most evident at high input voltages and low load currents. The out-
put voltage must be 3 V or higher to take advantage of this feature.
BOOSTED DRIVE STAGE
An external capacitor and diode are used to provide the boosted
voltage needed for the special drive stage. If the output voltage is
above 4 V, connect the anode of the boost diode to the regulated
output; for output voltages less than or equal to 3 V, connect it to
the input supply. For some low voltage systems (i.e., 5 V to 3.3 V
converters), the anode of the boost diode can be connected to
either the input or output voltage. During switch off-time, the
boost capacitor is charged up to the voltage at the anode of the
boost diode. When the switch turns on, this voltage is added to
the switch voltage (the boost diode is reverse-biased) providing a
voltage higher than the input supply. The peak voltage appearing
on the BOOST pin will be the sum of the input voltage and the
boost voltage (either V
voltage does not exceed the BOOST pin maximum rating of 45 V.
For most applications, a 1N4148 or 1N914 type diode can be
used with a 220 nF capacitor. A 470 nF capacitor may be needed
for output voltages between 3 V and 4 V. The boost capacitor
should have an ESR less than 2 Ω to ensure that it will be adequately
charged up during switch off-time. Most any type of film or ceramic
capacitor can be used.
START-UP/MINIMUM INPUT VOLTAGE
For most designs, the regulated output voltage provides the
boosted voltage for the drive stage. During startup, the output
voltage is zero, so there is no boosted supply for the drive stage.
C
will be in the range of 2 kΩ to 10 kΩ.
IN
+ V
OUT
or 2
F
F
is 100 pF. For ceramic output
is 400 pF.
V
IN
). Ensure that this peak
ADP3050
C
would need to