MAX3968 Maxim Integrated Products, MAX3968 Datasheet - Page 6

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MAX3968

Manufacturer Part Number
MAX3968
Description
(MAX3964 - MAX3968) 125Mbps to 266Mbps Limiting Amplifiers
Manufacturer
Maxim Integrated Products
Datasheet

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+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
Figure 1. Functional Diagram
The MAX3964 contains a series of limiting amplifiers
and power detectors, offset correction, data-squelch
circuitry, and PECL output buffers for data and loss-of-
signal (LOS) outputs. The MAX3965 is functionally the
same, but it provides TTL buffers on the LOS outputs.
The MAX3968 provides PECL LOS outputs with data
outputs suitable for 266Mbps. Figure 1 shows a func-
tional diagram of the MAX3964/MAX3965/MAX3968.
A series of four limiting amplifiers provides gain of
approximately 65dB.
Each amplifier stage contains a full-wave logarithmic
detector (FWD), which indicates the RMS input signal
power. The FWD outputs are summed together at the
FILTER pin where the signal is filtered by an external
capacitor (CFILTER) connected between FILTER and
V
age, which is proportional to the input power in deci-
bels. When LOS+ is low, V
following equation:
where V
6
CC
C
_______________________________________________________________________________________
FILTER
. The FILTER signal generates the RSSI output volt-
IN+/IN-
FWD = FULL-WAVE DETECTOR
IN
V
CC
is measured in mVp-p.
FILTER
V
RSSI
(V) = 1.2V + 0.5log (V
Detailed Description
MAX3964
MAX3965
MAX3968
V
FWD
CC
RSSI
LIMITER
Limiting Amplifiers
is approximated by the
Power Detector
FWD
REFERENCE
LIMITER
1.2V
IN
R1
)
INV
CZP
FWD
CORRECTION
OFFSET
R2
LIMITER
C
AZ
VTR
CZN
FWD
LIMITER
This relation translates to a 25mV increase in V
every 1dB increase in V
reduced approximately 120mV when LOS+ is asserted.
The data outputs (OUT+, OUT-) and the MAX3964/
MAX3968 loss-of-signal outputs (LOS+, LOS-) are sup-
ply-referenced PECL outputs. Standard PECL termina-
tion at each output of 50Ω to (V
for best performance.
The MAX3965 LOS outputs (LOS+, LOS-) are imple-
mented with open-collector Schottky-clamped TTL-
compatible outputs. The LOS outputs are pulled to V
internally with 2kΩ resistors and do not require external
pullup resistors.
A low-frequency feedback loop around the limiting
amplifier improves receiver sensitivity and powerdetec-
tor accuracy. The offset-correction loop’s bandwidth is
determined by an external capacitor (CAZ) connected
between the CZP and CZN pins.
The offset correction is optimized for data streams with
a 50% duty cycle. A different average duty cycle
results in increased pulse-width distortion and loss of
SUB
I
GND
LOS
COMPARATOR
I
O
IN
Input Offset Correction
(25mV/dB). The RSSI output is
CC
LOS+
V
(MAX3965 ONLY)
CCO
- 2V) is recommended
GNDO
PECL Outputs
TTL Outputs
OUT+/OUT-
SQUELCH
RSSI
LOS+/LOS-
RSSI
CC
for

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