ADC4320 Analogic Corporation, ADC4320 Datasheet

ADC4320

Manufacturer Part Number

ADC4320

Description

Manufacturer

Analogic Corporation

Datasheet

1.ADC4320.pdf (8 pages)

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Introduction

The ADC4320, ADC4322, and ADC4325 are complete 16-bit, 1 MHz, 2

MHz, and 500 kHz A/D converter subsystems with a built-in sample-and-

hold amplifier in a space-saving 46-pin hybrid package. They offer pin-

programmable input voltage ranges of ±2.5V, ±5V, ±10V and 0 to +10V,

and have been designed for use in applications, such as ATE, digital os-

cilloscopes, medical imaging, radar, sonar, and analytical instrumenta-

tion, requiring high speed and high resolution front ends. The ADC4322

is capable of digitizing a 1 MHz signal at a 2 MHz sampling rate with a

guarantee of no missing codes from 0°C to +70°C, or in an extended

temperature range version, from –25°C to +85°C. Equally impressive in

frequency domain applications, the ADC4325 features 91 dB minimum

signal-to-noise ratio with input signals from DC to 100 kHz.

The ADC432X Series utilizes the latest semiconductor technologies to

produce a cost-effective, high performance part in a 46-pin hybrid pack-

age. They are designed around a two-pass, sub-ranging architecture that

integrates a low distortion sample-and-hold amplifier, precision voltage

reference, ultra-stable 16-bit linear reference D/A converter, all necessary

timing circuitry, and tri-state CMOS/TTL compatible output lines for ease

of system integration.

Superior performance and ease-of-use make the ADC432X Series the

ideal solution for those applications requiring a sample-and-hold amplifier

directly at the input to the A/D converter. Having the S/H amplifier inte-

grated with the A/D converter benefits the system designer in two ways.

First, the S/H has been designed specifically to complement the perfor-

mance of the A/D converter; for example, the acquisition time, hold mode

settling and droop rate have been optimized for the A/D converter, result-

ing in exceptional overall performance. Second, the designer achieves

Figure 1. Functional Block Diagram.

S/H IN 3

S/H IN 1

S/H IN 2

DNC

EXT OFF ADJ

Ext Gain Adj

+REF OUT

–REF OUT

S/H

–1

–

Residue Amp

–6.4

16-Bit Linear

9-Bit DAC

Reference

–4

S/H Control

–0.2

9-Bit Data

MUX Amp

Sampling A/D Converters

in a Space-Saving 46-Pin Hybrid Package

Flash ADC

10-Bit

Pass1/Pass2

ADC Clk

Very High Speed 16-Bit,

Continued on page 5.

9-Bit

Data

Array

Gate

Timing

Circuit

Lo Byte EN

O/U Flow

Hi Byte EN

Transfer

B1-B16

Trigger

Features

Applications

ADC4320/ADC4322/

2 MHz, 1 MHz, and 500 kHz

Conversion Rates

16-Bit Resolution

0.003% Maximum Integral

Nonlinearity

No Missing Codes

Peak Distortion: –92 dB Max.

(100 kHz Input)

Signal to Noise Ratio:

Total Harmonic Distortion:

TTL/CMOS Compatibility

Low Noise

Electromagnetic/Electrostatic

Shielding

Digital Signal Processing

Sampling Oscilloscopes

Automatic Test Equipment

High-Resolution Imaging

Analytical Instrumentation

Medical Instrumentation

CCD Detectors

IR Imaging

Sonar/Radar

86 dB (ADC4322) Min.

89 dB (ADC4320) Min.

91 dB (ADC4325) Min.

(100 kHz Input)

–86 dB (ADC4320) Max.

–90 dB (ADC4325) Max.

ADC4325

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