MAX8588 Maxim Integrated Products, MAX8588 Datasheet - Page 27

• Manufacturer Part Number: MAX8588
• Description: High-Efficiency Low-IQ PMIC
• Manufacturer: Maxim Integrated Products

Note that the pole cancellation does not have to be
exact. R
R
selection.
If the output-filter capacitor has significant ESR, a zero
occurs at:
If Z
with ceramic or polymer output capacitors. If Z
less than f
capacitor C
If C
In applications that require load-transient response to
be optimized in favor of minimum component values,
increase the output-filter capacitor to increase the R in
the compensation RC. From the equations in the previ-
ous section, doubling the output cap allows a doubling
of the compensation R, which then doubles the tran-
sient gain.
The V3 output can be serially programmed to supply
from 0.7V to 1.475V in 25mV steps. In some cases, a
higher CPU core voltage may be desired. The V3 volt-
age range can be increased by adding two resistors as
shown in Figure 7.
R24 and R25 add a small amount of gain. They are set
so that an internally programmed value of 1.475V
results in a higher actual output at V3. The resistors
shown in Figure 1 set a maximum output of 1.55V, 1.6V,
or 1.65V. All output steps are shifted and the step size
is also slightly increased.
The output voltage for each programmed step of V3 in
Figure 7 is:
where V3 is the actual output voltage, V3PROG is the
original programmed voltage from the “OUTPUT (V)”
column in Table 2, and 185,500 is the internal resis-
tance of the FB3 pin.
LOAD
ESR
P
is calculated to be < 10pF, it can be omitted.
x C
> f
V3 = V3
(V3
C
x C
C
C
OUT
PROG
P
, it should be cancelled with a pole set by
, it can be ignored, as is typically the case
Z
connected from CC_ to GND:
ESR
C
. This provides flexibility in component
Dynamic Core for PDAs and Smartphones
Applications Information
PROG
need only be within 0.75 to 1.25 times
C
Extending the Maximum Core
/ 185,500)])
______________________________________________________________________________________
= 1 / (2π x C
P
= C
Optimizing Transient Response
+ (R24[(V3
OUT
R
ESR
OUT
PROG
High-Efficiency, Low-I
/ R
x R
Voltage Range
C
ESR
/ R25) +
)
ESR
is
The MAX8588 includes a backup-battery connection,
BKBT, and an output, V7. These can be utilized in differ-
ent ways for various system configurations.
A connection with a primary (nonrechargeable) lithium
coin cell is shown in Figure 6. The lithium cell connects to
BKBT directly. V7 powers the CPU VCC_BATT from either
V1 (if enabled) or the backup battery. It is assumed
whenever the main battery is good, V1 is on (either with
its DC-DC converter or sleep LDO) to supply V7.
If no backup battery is used, or if an alternate backup
and VCC_BATT scheme is used that does not use the
MAX8588, then BKBT should be biased from IN with a
small silicon diode (1N4148 or similar, as in Figure 8).
BKBT must still be powered when no backup battery is
used because DBO, RSO, and POK require this supply
to function. If BKBT is not powered, these outputs do
not function and are high impedance.
Figure 7. Addition of R24 and R25 increases maximum core
voltage. The values shown raise the maximum core from
1.475V to 1.55V.
Backup-Battery and V7 Configurations
**OTHER R24 VALUES:
R24 = 5.5kΩ, V3: 0.759V TO 1.60V
R24 = 7.7kΩ, V3: 0.783V TO 1.65V
STEP-DOWN
PWM
REG3
No Backup Battery (or Alternate Backup)
MAX8588
185.5kΩ
PV3
PG3
LX3
FB3
Q
Primary Backup Battery
PMIC with
TO BATT
3.3kΩ
R24**
www.DataSheet4U.com
R25
100kΩ
V3
VCC_CORE
1.55V MAX
27