MPC564 Motorola, MPC564 Datasheet

no-image

MPC564

Manufacturer Part Number
MPC564
Description
(MPC562 / MPC563 / MPC564) RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options
Manufacturer
Motorola
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564CVR40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC564CVR66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC564CZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC564CZP66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC564MVR56
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC564MVR56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC564MZP56
Manufacturer:
FREESCAL
Quantity:
364
Part Number:
MPC564MZP56
Manufacturer:
FREESCALE
Quantity:
20 000
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
© MOTOROLA 2001, All Rights Reserved
Product Brief
MPC561/MPC562 / MPC563/MPC564 RISC MCU
Including Peripheral Pin Multiplexing with
Flash and Code Compression Options
MOTOROLA
SEMICONDUCTOR
PRODUCT BRIEF
Features
The MPC561/MPC562 / MPC563/MPC564 are members of the Motorola MPC500 RISC Microcontroller
family. As shown in the block diagram, they are composed of:
Key Feature Details
• High performance CPU system
• PPM (peripheral pin multiplexing with parallel-to-serial driver) module
• Available in package or die
MPC500 System Interface (USIU)
• System configuration and protection features:
— High performance core
— MPC500 system interface (USIU, BBC, L2U)
— Fully static design
— Four major power saving modes
— 32-Kbyte static RAM (CALRAM)
— 512-Kbyte flash (UC3F) on MPC563/MPC564
— General-purpose I/O support
— Plastic ball grid array (PBGA) packaging
— Periodic-interrupt timer
— Bus monitor
— Software watchdog timer
— Real-time clock (RTC)
• Single issue integer core
• Compatible with PowerPC instruction set architecture
• Precise exception model
• Floating point
• Extensive system development support
• On, doze, sleep, deep-sleep and power-down
• On address (24) and data (32) pins
• 16 GPIO in MIOS14
• Many peripheral pins can be used as GPIO when not used as primary functions
• 2.6-V outputs on external bus pins
— On-chip watchpoints and breakpoints
— Program flow tracking
— Background debug mode (BDM)
— IEEE-ISTO Nexus 5001-1999 Class 3 Debug Interface
MPC561/MPC562
MPC563/MPC564
Rev. 1, December 2001

Related parts for MPC564

MPC564 Summary of contents

Page 1

... MPC561/MPC562 / MPC563/MPC564 RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options Features The MPC561/MPC562 / MPC563/MPC564 are members of the Motorola MPC500 RISC Microcontroller family. As shown in the block diagram, they are composed of: • High performance CPU system — High performance core • ...

Page 2

... USIU supports dual mapping to map part of one internal/external memory to another external memory • USIU supports dual mapping of flash on MPC563 and MPC564 to move part of internal flash mem- ory to external bus for development • External bus, supporting non-wraparound burst for instruction fetches, with instructions per ...

Page 3

... Automated queue modes initiated by: — External edge trigger — Software command — Periodic/interval timer within QADC64E module, that can be assigned to both queue 1 and 2 — External Gated trigger (queue 1only) • 64 result registers — Output data is right- or left-justified, signed or unsigned MPC561/MPC563 PRODUCT BRIEF MOTOROLA 3 ...

Page 4

... Software configurable clock (TCLK) based on system clock • Software selectable clock modes (SPI mode and TDM mode) • Software selectable operation modes — Continuous mode — Start-transmit-receive (STR) mode • Software configurable internal modules interconnect (shorting) MPC561/MPC563 PRODUCT BRIEF MOTOROLA 4 ...

Page 5

... MPC561/MPC562 / MPC563/MPC564 Optional Features The following are optional features of the MPC561/MPC562 / MPC563/MPC564: • 56-MHz operation (40 MHz is default) • Code compression supported on the MPC562 and the MPC564 — Compression reduces instruction memory requirements by 40-50% — Compression optimized for automotive (non-cached) applications • 512 Kbytes flash (available on the MPC563/MPC564 only) — ...

Page 6

... Reserved (L-bus Mem) 464 Kbytes 0x3F 7FFF 0x3F 8000 CALRAM 32 Kbytes 0x3F F000 4-Kbyte Overlay Section 0x3F FFFF *NOTE: Only available on MPC563/MPC564. Figure 2 MPC561 / MPC563 Internal Memory Map MPC561/MPC563 USIU Control Registers UC3F Control Registers* DPTRAM Control (32 bytes) Reserved (8160 bytes) DPTRAM (8 Kbytes) ...

Page 7

... VSS PIOA15 NOTE: The flash balls are only available on the MPC563 and MPC564. These are no connect balls on the MPC561 and MPC562. Flash supplies and inputs are located on the following balls: T23, T24, U24, U25. U26. MPC561/MPC563 ...

Page 8

... MPC563 MPC563CZP56 MPC564 MPC564MZP40 MPC564 MPC564CZP40 MPC564 MPC564MZP56 MPC564 MPC564CZP56 NOTES: 1. Add R2 suffix for parts shipped in tape and reel media. Table 2 lists the documents that provide a complete description of the MPC561/563 and are required to design properly with the part. Documentation is available from a local Motorola distributor, a Motorola semiconductor sales office, a Motorola Literature Distribution Center, or through the Motorola Semicon- ductor documentation page on the Internet (the source for the latest information) ...

Page 9

... MPC561/MPC563 PRODUCT BRIEF MOTOROLA 9 ...

Page 10

... MPC561/MPC563 PRODUCT BRIEF MOTOROLA 10 ...

Page 11

... MPC561/MPC563 PRODUCT BRIEF MOTOROLA 11 ...

Page 12

... Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, ...

Related keywords