TS87C51RB2 ATMEL Corporation, TS87C51RB2 Datasheet
TS87C51RB2
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TS87C51RB2 Summary of contents
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... On the next JBC instruction another IT is pending. Therefore, the same IT is seen twice. Workaround Use JB Instruction instead of JBC instruction to test bit and CLR instruction to clear it.n twice. 8051 Microcontrollers TS87C51RB2 TS80C51RB2 Errata Sheet Rev. 4154C–8051–04/03 1 ...
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Timer2/Downcounter Mode/Double IT with Slow External Clock Double IT with slow external clock in downcount mode. Timer 2 in 16-bit autoreload in count-down mode with external clock input two interrupts are generated successively with low frequency on clock input ...
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... FAX (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...