74ACTQ16543MTD Fairchild Semiconductor, 74ACTQ16543MTD Datasheet

74ACTQ16543MTD

Manufacturer Part Number

74ACTQ16543MTD

Description

TXRX/REGISTER 16BIT 3ST 56TSSOP

Manufacturer

Fairchild Semiconductor

Series

74ACTQr

Datasheet

1.74ACTQ16543MTD.pdf (9 pages)

Specifications of 74ACTQ16543MTD

Logic Type

Transceiver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

24mA, 24mA

Voltage - Supply

4.5 V ~ 5.5 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

48-TSSOP

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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74ACTQ16543SSC

74ACTQ16543MTD

74ACTQ16543

16-Bit Registered Transceiver with 3-STATE Outputs

General Description

The ACTQ16543 contains sixteen non-inverting transceiv-

ers containing two sets of D-type registers for temporary

storage of data flowing in either direction. Each byte has

separate control inputs which can be shorted together for

full 16-bit operation. Separate Latch Enable and Output

Enable inputs are provided for each register to permit inde-

pendent input and output control in either direction of data

flow.

The ACTQ16543 utilizes Fairchild Quiet Series

ogy to guarantee quiet output switching and improved

dynamic threshold performance. FACT Quiet Series

tures GTO

superior performance.

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

FACT , Quiet Series , FACT Quiet Series

Order Number

output control and undershoot corrector for

Package Number

MS56A

MTD56

and GTO

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

DS010967.prf

are trademarks of Fairchild Semiconductor Corporation.

technol-

fea-

Features

Pin Descriptions

OEAB

OEBA

CEAB

CEBA

LEAB

LEBA

Pin Names

Utilizes Fairchild FACT Quiet Series technology

Guaranteed simultaneous switching noise level and

dynamic threshold performance

Guaranteed pin-to-pin output skew

Independent registers for A and B buses

Separate controls for data flow in each direction

Back-to-back registers for storage

Multiplexed real-time and stored data transfers

Separate control logic for each byte

16-bit version of the ACTQ543

Outputs source/sink 24 mA

Additional specs for Multiple Output Switching

Output loading specs for both 50 pF and 250pF loads

–A

–B

Package Description

A-to-B Output Enable Input (Active LOW)

B-to-A Output Enable Input (Active LOW)

A-to-B Enable Input (Active LOW)

B-to-A Enable Input (Active LOW)

A-to-B Latch Enable Input (Active LOW)

B-to-A Latch Enable Input (Active LOW)

A-to-B Data Inputs or

B-to-A 3-STATE Outputs

B-to-A Data Inputs or

A-to-B 3-STATE Outputs

Descriptions

December 1991

Revised December 1998

www.fairchildsemi.com

Related parts for 74ACTQ16543MTD

74ACTQ16543MTD Summary of contents

Page 1

... MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ACTQ16543MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...

Page 2

Connection Diagram Pin Assignment for SSOP and TSSOP www.fairchildsemi.com Functional Description The ACTQ16543 contains sixteen non-inverting transceiv- ers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins may ...

Page 3

Logic Diagrams Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Please note that this diagram is provided only for the understanding of logic operations and ...

Page 4

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Output Diode Current ( 0. 0. Output ...

Page 5

DC Electrical Characteristics Note 5: Maximum number of outputs that can switch simultaneously Note 6: Maximum number of outputs that can switch simultaneously Note 7: Maximum number of data inputs (n) switching ...

Page 6

Extended AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH t Transparent Mode PHL Propagation Delay PLH t LEBA , LEAB PHL n n ...

Page 7

FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package (SSOP), JEDEC MO-153, 6.1mm Wide www.fairchildsemi.com Package Number MS56A 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE ...

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