SDA5642-6X Siemens, SDA5642-6X Datasheet - Page 9

• Manufacturer Part Number: SDA5642-6X
• Description: VPS-Decoder
• Manufacturer: Siemens

2.2
2.2.1
The I
i.e., both reading from and writing to the VPS decoder is possible. The clock line SCL is
controlled only by the bus master usually being a micro controller, whereas the SDA line
is controlled either by the master or by the slave. A data transfer can only be initiated by
the bus master when the bus is free, i.e., both SDA and SCL lines are in a high state. As
a general rule for the I
The only exception to that rule are the Start Condition and the Stop Condition. Further
Details are given below. The following abbreviations are used:
START:
AS:
AM:
NAM:
STOP:
2.2.2
There are two pairs of chip addresses, which are selected by the CS0-input pin
according to the following table:
CS0 Input
Low
High
Semiconductor Group
2
C-Bus interface implemented on the VPS decoder is a slave transmitter/receiver,
I
General Information
Chip Address
2
C Bus
Start Condition generated by master
Acknowledge by slave
Acknowledge by master
No Acknowledge by master
Stop condition generated by master
2
C Bus, the SDA line changes state only when the SCL line is low.
Write Mode
20 (hex)
22 (hex)
9
Read Mode
21 (hex)
23 (hex)
SDA 5642-6/X
02.97