SDA5650X Siemens, SDA5650X Datasheet - Page 10

• Manufacturer Part Number: SDA5650X
• Description: VPS / PDC-plus Decoder
• Manufacturer: Siemens

Semiconductor Group
2.2.2
There are two pairs of chip addresses, which are selected by the CS0-input pin
according to the following table:
CS0 Input
Low
High
2.2.3
For writing to the PDC decoder, the following format has to be used:
Description of Data Transfer (Write Mode)
Step1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
The write mode is used to set the I
operating mode:
Start Chipaddress and Write Mode AS
Chip Address
Write Mode
In order to start a data transfer the master generates a Start Condition on the
bus by pulling the SDA line low while the SCL line is held high.
The bus master puts the chip address on the SDA line during the next eight
SCL pulses.
The master releases the SDA line during the ninth clock pulse. Thus the slave
can generate an acknowledge (AS) by pulling the SDA line to a low level.
The controller transmits the data byte to set the Control register
The slave acknowledges the reception of the byte.
The master concludes the data communication by generating a Stop
Condition.
Write Mode
20 (hex)
22 (hex)
2
C-Bus control register which determines the
10
Byte to set Control Register
Read Mode
21 (hex)
23 (hex)
SDA 5650/X
AS
Stop
02.97