ISL28107 Intersil Corporation, ISL28107 Datasheet - Page 10

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ISL28107

Manufacturer Part Number
ISL28107
Description
(ISL28107 / ISL28207) RS-485/RS-422 Transceivers
Manufacturer
Intersil Corporation
Datasheet

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Applications Information
Functional Description
The ISL28107 and ISL28207 are single and dual, very low
1/f noise (14nV/√Hz @ 10Hz) precision op-amps. These
amplifiers feature very high open loop gain (50kV/mV) for
excellent CMRR (145dB), and gain accuracy. Both devices
are fabricated in a new precision 40V complementary bipolar
DI process.
The super-beta NPN input stage with bias current cancellation
provides bipolar-like levels of AC performance with the low
input bias currents approaching JFET levels. The temperature
stabilization provided by bias current cancellation removes the
high input bias current temperature coefficient commonly
found in JFET amplifiers. Figures 7 and 8 show the input bias
current variation over temperature.
The input offset voltage (V
value of 75µV max at +25°C and a maximum T
0.65µV/°C. Figure 6 shows V
voltage and temperature with the common mode voltage at
0V for split supply operation.
The complimentary bipolar output stage maintains stability
driving large capacitive loads (to 10nF) without external
compensation. The small signal overshoot vs. load
capacitance is shown in Figure 28.
Operating Voltage Range
The devices are designed to operate over the 4.5V (±2.25V)
to 40V (±20V) range and are fully characterized at 10V (±5V)
and 30V (±15V). Both DC and AC performance remain
virtually unchanged over the complete 4.5V to 40V operating
voltage range. Parameter variation with operating voltage is
shown in the “Typical Performance Curves” beginning on
page 4. The input common mode voltage range sensitivity to
temperature is shown in Figure 9 (±15V).
Input ESD Diode Protection
The input terminals (IN+ and IN-) each have internal ESD
protection diodes to the positive and negative supply rails, a
series connected 500Ω current limiting resistor followed by an
anti-parallel diode pair across the input NPN transistors
(Circuit 1 in “Pin Descriptions” on page 9).
The resistor-ESD diode configuration enables a wide
differential input voltage range equal to the lesser of the
Maximum Supply Voltage in the “Absolute Maximum
Ratings” on page 2 (42V) or, a maximum of 0.5V beyond the
V+ and V- supply voltage. The internal protection resistors
eliminate the need for external input current limiting resistors
in unity gain connections and other circuit applications where
large voltages or high slew rate signals are present. Although
the amplifier is fully protected, high input slew rates that
exceed the amplifier slew rate (±0.32V/µs) may cause output
distortion.
OS
10
) has an very low, worst case
OS
as a function of supply
C
of
ISL28107, ISL28207
Output Current Limiting
The output current is internally limited to approximately
±40mA at +25°C and can withstand a short circuit to either
rail as long as the power dissipation limits are not exceeded.
This applies to only 1 amplifier at a time for the dual op-amp.
Continuous operation under these conditions may degrade
long term reliability.
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier
transfer function when the input voltage exceeds the supply
voltage. The ISL28107 and ISL28207 are immune to output
phase reversal, even when the input voltage is 1V beyond
the supplies.
Using Only One Channel
The ISL28207 is a dual op-amp. If the application only
requires one channel, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
inverting input and ground the positive input (as shown in
Figure 29).
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply
conditions. It is therefore important to calculate the
maximum junction temperature (T
determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related using
Equation 1:
where:
• P
• PD
T
PD
JMAX
FIGURE 29. PREVENTING OSCILLATIONS IN UNUSED
of each amplifier in the package (PD
Equation 2:
MAX
DMAXTOTAL
MAX
=
=
T
for each amplifier can be calculated using
V
MAX
S
×
CHANNELS
is the sum of the maximum power dissipation
I
+
qMAX
θ
JA
xPD
+
(
V
MAXTOTAL
S
+
-
- V
OUTMAX
JMAX
) for all applications to
MAX
)
×
V
--------------------------- -
)
OUTMAX
R
L
June 5, 2009
(EQ. 2)
FN6631.0
(EQ. 1)

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