ISL3158E Intersil Corporation, ISL3158E Datasheet - Page 8

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ISL3158E

Manufacturer Part Number
ISL3158E
Description
(ISL3150E - ISL3158E) RS-485/RS-422 Transceivers
Manufacturer
Intersil Corporation
Datasheet

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Electrical Specifications
NOTES:
10. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
12. Guaranteed by characterization but not tested.
13. See Figure 8 for more information, and for performance over temperature.
Test Circuits and Waveforms
11. Set the RE signal high time >600ns to ensure that the device enters SHDN.
Receiver Enable from Shutdown to
Output Low
RECEIVER SWITCHING CHARACTERISTICS (20Mbps Versions; ISL3156E, ISL3158E)
Maximum Data Rate
Receiver Input to Output Delay
Receiver Skew | t
Receiver Enable to Output Low
Receiver Enable to Output High
Receiver Disable from Output Low
Receiver Disable from Output High
Time to Shutdown
Receiver Enable from Shutdown to
Output High
Receiver Enable from Shutdown to
Output Low
4. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
5. Supply current specification is valid for loaded drivers when DE = 0V.
6. Applies to peak current. See “Typical Performance Curves” for more information.
7. Keep RE = 0 to prevent the device from entering SHDN.
8. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
9.
Transceiver
specified.
not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low-Power
Shutdown Mode” section.
V
CC
PARAMETER
DE
DI
s are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed
PLH
FIGURE 1A. V
D
- t
ISL3150E, ISL3152E, ISL3153E, ISL3155E, ISL3156E, ISL3158E
PHL
Z
Y
|
8
OD
V
Test Conditions: V
(Note 4) (Continued)
OD
t
t
t
t
SYMBOL
PLH
ZH(SHDN)
ZL(SHDN)
ZL(SHDN)
AND V
t
SHDN
f
t
MAX
SKD
t
t
t
t
ZH
HZ
ZL
LZ
, t
PHL
OC
R
R
L
L
/2
/2
R
(Notes 9, 11)
(Figure 5, Note 12)
(Figure 5)
(Figure 5)
R
(Note 8)
R
(Note 8)
R
R
(Notes 9, 12)
R
(Notes 9, 11)
R
(Notes 9, 11)
FIGURE 1. DC DRIVER TEST CIRCUITS
L
L
L
L
L
L
L
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
CC
V
OC
= 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
L
L
L
L
L
L
L
TEST CONDITIONS
= 15pF, SW = V
= 15pF, SW = V
= 15pF, SW = GND (Figure 6),
= 15pF, SW = V
= 15pF, SW = GND (Figure 6)
= 15pF, SW = GND (Figure 6),
= 15pF, SW = V
V
CC
CC
CC
CC
CC
(Figure 6),
(Figure 6),
(Figure 6)
(Figure 6),
DE
DI
FIGURE 1B. V
D
Z
Y
TEMP
(°C)
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
OD
WITH COMMON MODE LOAD
V
OD
MIN
20
60
-
-
-
-
-
-
-
-
-
CC
R
TYP
160
L
= 5V, T
2.5
33
30
8
7
8
8
-
-
-
= 60Ω
A
MAX
December 14, 2006
= +25°C
200
600
200
200
45
15
15
15
15
5
-
375Ω
375Ω
-7V to +12V
FN6363.0
UNITS
Mbps
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CM

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