ISL85033 Intersil, ISL85033 Datasheet
ISL85033
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ISL85033 Summary of contents
Page 1
... The protection features include overcurrent, UVLO and thermal overload protection. The ISL85033 is available in a small 4mmx4mm Thin Quad Flat Pb-free (TQFN) package. Related Literature* (see page 24) • See AN1574 ” ...
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... FB1, FB2 3, 19 SS1, SS2 4, 18 PGND1, PGND2 5, 17 BOOT1, BOOT2 6, 7, 15, 16 PHASE1, PHASE2 8, 9, 13, 14 VIN1, VIN2 10, 12 EN1, EN2 11 VCC 23 SYNCOUT 2 ISL85033 ISL85033 ISL85033 (28 LD TQFN) TOP VIEW FB1 2 SS1 ...
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... The exposed pad must be connected to the system GND plane with as many vias as possible for proper electrical and thermal performance 8.06k 8.06k 470pF 470pF 69.8k 69. ISL85033 28 15/ www.DataSheet4U.com V OUT1 R 1 42. 68pF 1 2 VIN1 8 VIN2 13/14 20 µ µ ...
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... FIGURE 3. SINGLE 6A OUTPUT (VIN RANGE FROM 4.5V TO 28V) CURRENT SHARING 4 ISL85033 ISL85033 (Continued) FB2 R 6 8.06k C 5 1nF R 8 34k SS2 19 SS1 3 22 ISL85033 28 15/ www.DataSheet4U.com COMP2 FB2 1 2 VIN1 8 VIN2 20 µ F 13/14 10 µ F C72 PHASE1 6/7 ...
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... MONITOR FAULT MONITOR EN2 POWER-ON VIN1 LDO RESET CC MONITOR VIN1 EN1 FAULT MONITOR MONITOR VOLTAGE CONTROL SS1 SOFT-START VCC 5MΩ VCC 5 ISL85033 ISL85033 - + -10 COMP2 0.8V REFERENCE CSA2 + SLOPE COMP CSA2 THERMAL MONITOR +150°C CSA1 + SLOPE COMP CSA1 0.8V REFERENCE COMP1 ...
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... SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL85033. For more information on MSL please see techbrief TB363. ...
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... Buck Regulator Output Capacitor Selection ......................................................................................... 18 Current Sharing Configuration........................................................................................................... 19 Input Capacitor Selection ................................................................................................................. 19 Loop Compensation Design............................................................................................................... 19 Theory of Compensation .................................................................................................................. 20 PWM Comparator Gain Fm................................................................................................................ 20 Power Stage Transfer Functions ........................................................................................................ 20 Rectifier Selection ........................................................................................................................... 21 Power Derating Characteristics.......................................................................................................... 22 Layout Considerations...................................................................................................................... 22 Revision History ................................................................................................................................ 24 Products ............................................................................................................................................ 24 Package Outline Drawing ................................................................................................................. 25 7 ISL85033 ISL85033 www.DataSheet4U.com FN6676.1 June 24, 2010 ...
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... Gain FB1, FB2 Leakage Current Current Sense Amplifier Gain Reference Voltage 8 ISL85033 ISL85033 Thermal Information Thermal Resistance QFN Package (Notes Maximum Junction Temperature (Plastic Package +150°C Maximum Storage Temperature Range . . . -65°C to +150°C Ambient Temperature Range . . . . . . . . . . . -40°C to +85°C Junction Temperature Range . . . . . . . . . . -55° ...
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... Established by both current sense amplifier gain test and current sense amplifier output test @ I 8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 9 ISL85033 ISL85033 = -40°C to +85° 4.5V to 28V, unless otherwise noted. Typical values are +25° ...
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... OUTPUT LOAD (A) FIGURE 8. POWER DISSIPATION vs LOAD +85°C, CURRENT SHARING 500kHz SW 10 ISL85033 ISL85033 Circuit of Figure 3A -40°C to +85°C, unless otherwise noted. Typical OUT2 A values are +25°C. A 100 90 80 12V 1MHz OUT 1MHz ...
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... INPUT VOLTAGE (V) FIGURE 14. OUTPUT VOLTAGE REGULATION vs V CHANNEL +25°C, 3. 500kHz SW 11 ISL85033 ISL85033 Circuit of Figure 3A -40°C to +85°C, unless otherwise noted. Typical OUT2 A values are +25°C. (Continued) A 3.329 3.328 3.326 3.325 12V IN 3 ...
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... FIGURE 18. STEADY STATE OPERATION WITH FULL LOAD CHANNEL 1 LX2 10V/DIV V RIPPLE 20mV/DIV OUT LX1 10V/DIV FIGURE 20. STEADY STATE OPERATION WITH FULL LOAD CURRENT SHARING 12 ISL85033 ISL85033 Circuit of Figure 3A -40°C to +85°C, unless otherwise noted. Typical OUT2 A values are +25°C. (Continued) A LX1 5V/DIV ...
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... Typical Performance Curves V RIPPLE 20mV/DIV OUT2 FIGURE 22. LOAD TRANSIENT CHANNEL 2 FIGURE 24. SOFT-START WITH NO LOAD CHANNEL 2 FIGURE 26. SOFT-START AT FULL LOAD CHANNEL 2 13 ISL85033 ISL85033 Circuit of Figure 3A -40°C to +85°C, unless otherwise noted. Typical OUT2 A values are +25°C. (Continued) ...
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... LX1 10V/DIV V RIPPLE 20mV/DIV OUT1 LX2 10V/DIV SYNC 5V/DIV FIGURE 32. STEADY STATE OPERATION CHANNEL 1 AT FULL LOAD WITH SYNC FREQUENCY = 4MHz 14 ISL85033 ISL85033 Circuit of Figure 3A -40°C to +85°C, unless otherwise noted. Typical OUT2 A values are +25°C. (Continued) ...
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... Typical Performance Curves FIGURE 34. OUTPUT SHORT CIRCUIT CHANNEL 1 FIGURE 36. OUTPUT SHORT CIRCUIT CHANNEL 2 15 ISL85033 ISL85033 Circuit of Figure 3A -40°C to +85°C, unless otherwise noted. Typical OUT2 A values are +25°C. (Continued) A PHASE1 10V/DIV IL1 2A/DIV V 2V/DIV OUT1 PG1 5V/DIV FIGURE 35 ...
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... All internal power devices are held in a high-impedance state while in shutdown mode. The EN pin enables the controller of the ISL85033. When the voltage on the EN pin exceeds its logic rising threshold, the controller initiates the 2ms soft-start function for the PWM regulator ...
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... Protection Features C 4 The ISL85033 limits the current in all on-chip power devices. Overcurrent protection limits the current on the two buck regulators and internal LDO for V Buck Regulator Overcurrent Protection During the PWM on-time, the current through the internal switching MOSFET is sampled and scaled through an internal pilot device ...
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... This operation may arise during long periods of no switching load situations. Application Guidelines Operating Frequency The ISL85033 operates at a default switching frequency of 500kHz tied to VCC. Tie a resistor from FS to GND to program the switching frequency from 300kHz to 2MHz, as shown in Equation 3. ...
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... OUT ISL85033 uses a constant frequency current mode control architecture to achieve simplified loop compensation and fast loop transient response. The compensator schematic is shown in Figure 47. As mentioned in the COUT selection, ISL85033 allows the usage of low ESR output capacitor. Choice of the loop 1.08 1.10 bandwidth f exceed 1/4 of the switching frequency starting ...
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... Where trans-resistance, and is the product of the current T sensing resistance and gain of the current amplifier in current loop. 20 ISL85033 ISL85033 CURRENT SAMPLING TRANSFER FUNCTION (EQ. 12) In current loop, the current signal is sampled every switching cycle. Equation 15 shows the transfer function: (Ω) and Rc ...
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... Example 12V 5V 220µF/5mΩ 5.6µ ISL85033 ISL85033 V = 0.8V 80kHz, then compensator resistance R c Put the compensator zero at 6.6kHz (~1.5x C put the compensator pole at ESR zero, which is 1.45MHz. The compensator capacitors are: V COMP V COMP C = 470pF, C ...
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... The device power dissipation must be reduced to maintain the junction temperature at or below the thermal shutdown level. Figure 49 illustrates the power derating versus ambient temperature for the ISL85033 EVAL kit. Note that the EVAL kit derating curve is based on total circuit dissipation, not IC dissipation alone. 120 ...
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... FB pin with vias tied straight to the ground plane as required. L1 Cout1 VOUT1 FIGURE 50. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS 23 ISL85033 Fb1 ISL85033 SL85033 LX1 trace LX2 trace . . . . . . . . . . . . . . . . . . ...
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... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 24 ISL85033 for a complete list of Intersil product families. ISL85033 www.intersil.com/askourstaff http://rel.intersil.com/reports/search.php www.intersil.com/product_tree www.intersil.com/design/quality www.DataSheet4U.com CHANGE www ...
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... L28.4x4 28 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 9/ PIN 1 INDEX AREA TOP VIEW (3 . 20) PACKAGE BOUNDARY ( 50) TYPICAL RECOMMENDED LAND PATTERN 25 ISL85033 ISL85033 MAX (28X 40) (28X 0 . 60) NOTES: 1. Controlling dimensions are in mm. ...