ISL90843 Intersil Corporation, ISL90843 Datasheet - Page 7

• Manufacturer Part Number: ISL90843
• Description: Quad Digital Controlled Potentiometers
• Manufacturer: Intersil Corporation

Typical Performance Curves
Principles of Operation
The ISL90843 is an integrated circuit incorporating four
DCPs with their associated registers, and an I
interface providing direct communication between a host
and the potentiometers.
DCP Description
Each DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each
DCP are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL pins). The RW pin of each DCP is
connected to intermediate nodes, and is equivalent to the
wiper terminal of a mechanical potentiometer. The position
of the wiper terminal within the DCP is controlled by an 8-bit
volatile Wiper Register (WR). Each DCP has its own WR.
When the WR of a DCP contains all zeroes (WR<7:0>: 00h),
its wiper terminal (RW) is closest to its “Low” terminal (RL).
When the WR of a DCP contains all ones (WR<7:0>: FFh),
its wiper terminal (RW) is closest to its “High” terminal (RH).
FIGURE 9. MIDSCALE GLITCH, CODE 80h TO 7Fh (WIPER 0)
-0.50
-1.00
-1.50
FIGURE 7. END TO END R
1.50
1.00
0.50
0.00
-40
5.5V
Wiper Movement Mid Point
From 80h to 7fh
Signal at Wiper (Wiper Unloaded)
TEMPERATURE
-20
2.7V
0
TEMPERATURE (°C)
TOTAL
7
20
% CHANGE vs
40
(Continued)
2
C serial
60
80
ISL90843
As the value of the WR increases from all zeroes (00h) to all
ones (255 decimal), the wiper moves monotonically from the
position closest to RL to the closest to RH. At the same time,
the resistance between RW and RL increases monotonically,
while the resistance between RH and RW decreases
monotonically.
While the ISL90843 is being powered up, all four WRs are
reset to 80h (128 decimal), which locates RW roughly at the
center between RL and RH.
The WRs can be read or written directly using the I
interface as described in the following sections. The I
interface Address Byte has to be set to 00hex, 01hex,
02hex, and 03hex to access the WR of DCP0, DCP1, DCP2,
and DCP3 respectively.
I
The ISL90843 supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the
2
C Serial Interface
-10
-20
20
10
FIGURE 8. TC FOR VOLTAGE DIVIDER MODE IN ppm
0
32
FIGURE 10. LARGE SIGNAL SETTLING TIME
82
TAP POSITION (DECIMAL)
SCL
132
Signal at Wiper
(Wiper Unloaded Movement
From ffh to 00h)
182
March 29, 2006
2
C serial
232
2
FN8095.2
C