ISL97650 Intersil Corporation, ISL97650 Datasheet - Page 17

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ISL97650

Manufacturer Part Number
ISL97650
Description
4-Channel Integrated LCD Supply
Manufacturer
Intersil Corporation
Datasheet

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Start-Up Sequence
Figure 18 shows a detailed start up sequence waveform. For
a successful power up, there should be 6 peaks at V
When a fault is detected, the device will latch off until either
EN is toggled or the input supply is recycled.
When the input voltage is higher than 3.85V, V
as well as V
source starts to charge C
NOTE: Not to scale
LOGIC
if the ENL is high. an internal current
V
CDLY
DELAYED
ON SLICE
V
V
V
BOOST
BOOST
V
LOGIC
V
V
17
CDLY
V
REF
OFF
V
EN
to an upper threshold using a
ON
IN
REF
t
FIGURE 18. START-UP SEQUENCE
START-UP
turns on,
START-UP SEQUENCE
CDLY
TIMED BY C
t
VOFF
.
ISL97650
DLY
t
SS
fast ramp followed by a slow ramp. During the initial slow
ramp, the device checks whether there is a fault condition. If
no fault is found, C
V
Initially the boost is not enabled so A
V
A
not desirable, an external PMOS FET can be used to delay
VDD
REF
DIODE
t
VON
turns on.
during this part of the start-up sequence. If this step is
through the output diode. Hence, there is a step at
OPERATION
NORMAL
t
CDLY
VON-SLICE
is discharged after the first peak and
PRESENT
FAULT
VDD
rises to V
November 28, 2006
IN
-
FN9198.3

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