SCC2692 Philips, SCC2692 Datasheet - Page 6

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SCC2692

Manufacturer Part Number
SCC2692
Description
Dual asynchronous receiver/transmitter DUART
Manufacturer
Philips
Datasheet

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1. Parameters are valid over specified temperature range.
2. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4V and 2.4V with a transition time of 5ns
3. Typical values are at +25 C, typical supply voltages, and typical processing parameters.
4. Test conditions for outputs: C
5. All outputs are disconnected. Inputs are switching between CMOS levels of V
6. T
7. T
8. See UART application note for 5 A.
Philips Semiconductors
DC ELECTRICAL CHARACTERISTICS
NOTES:
AC CHARACTERISTICS
1998 Sep 04
SYM-
BOL
V
V
V
V
V
V
I
I
I
I
I
I
I
I
I
I
I
I
I
SYMBOL
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
IX1PD
ILX1
IHX1
OHX2
OHX2S
OLX2
OLX2S
I
OZH
OZL
ODL
ODH
CC
RES
AS
AH
CS
CH
RW
DD
DA
DF
DI
DS
DH
RWD
Dual asynchronous receiver/transmitter (DUART)
Reset Timing (See Figure 3)
Bus Timing
maximum. For X1/CLK this swing is between 0.4V and 4.4V. All time measurements are referenced at input voltages of 0.8V and 2.0V and
output voltages of 0.8V and 2.0V, as appropriate.
IL
IH
IH
IH
OL
OH
A
A
> 0 C
< 0 C
Input low voltage
Input high voltage (except X1/CLK)
Input high voltage (except X1/CLK)
Input high voltage (X1/CLK)
Output low voltage
Output high voltage (except OD outputs)
X1/CLK input current - power down
X1/CLK input low current - operating
X1/CLK input high current - operating
X2 output high current - operating
X2 output high short circuit current - operating
X2 output low current - operating
X2 output low short circuit current - operating and power down
Input leakage current:
Output off current high, 3-state data bus
Output off current low, 3-state data bus
Open-drain output low current in off-state
Open-drain output high current in off-state
Power supply current
5
RESET pulse width
A0-A3 setup time to RDN, WRN Low
A0-A3 hold time from RDN, WRN Low
CEN setup time to RDN, WRN Low
CEN hold time from RDN, WRN High
WRN, RDN pulse width
Data valid after RDN Low
RDN Low to data bus active
Data bus floating after RDN High
RDN High to data bus invalid
Data setup time before WRN High
Data hold time after WRN High
High time between reads and/or writes
(See Figure 4)
All except input port pins
Operating mode
Power down mode
Input port pins
1, 2, 4
L
= 150pF, except interrupt outputs. Test conditions for interrupt outputs: C
5
8
PARAMETER
PARAMETER
7
7
6
7
PARAMETER
PARAMETER
1, 2, 3
5, 6
4
6
V
CC
TEST CONDITIONS
TEST CONDITIONS
V
V
OUT
CMOS input levels
CMOS input levels
OUT
V
OUT
-0.2V and V
V
V
V
OUT
I
I
OH
IN
IN
IN
OL
= V
V
V
V
V
= V
= 0, X1 = V
V
IN
IN
V
IN
= 0 to V
= 0 to V
= 0 to V
IN
= -400 A
= 0, X1 = 0
= 2.4mA
IN
IN
CC
= V
= V
= V
CC
= 0V
= 0
= 0
, X1 = V
, X1 = 0
CC
CC
CC
SS
CC
CC
CC
CC
+ 0.2V.
CC
Min
200
100
225
100
200
10
15
20
20
0
0
V
0.8 V
L
CC
= 50pF, R
Min
2.0
2.5
-10
-75
-10
-75
-10
-20
-10
-10
0
0
1
-0.5
LIMITS
CC
Typ
LIMITS
3
L
Typ
= 2.7K to V
2
Product specification
Max
175
125
SCC2692
Max
+10
+75
+10
+10
0.8
0.4
75
10
10
10
10
10
-1
0
0
CC
UNIT
UNIT
.
UNIT
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
V
V
V
V
V
V
A
A
A
A
A
A
A
A
A
A
A

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