FIN3386 Fairchild Semiconductor, FIN3386 Datasheet - Page 3

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FIN3386

Manufacturer Part Number
FIN3386
Description
(FIN3383 - FIN3386) Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers
Manufacturer
Fairchild Semiconductor
Datasheet
TRANSMITTERS
Pin Descriptions
Connection Diagram
FIN3383 and FIN3385 (28:4 Transmitter)
TxCLKOut
TxCLKOut
Pin Names
LVDS GND
LVDS V
PLL GND
TxCLKIn
PLL V
TxOut
TxOut
PwrDn
R_FB
GND
Pin Assignment for TSSOP
TxIn
V
NC
CC
CC


CC


I/O Type Number of Pins
O
O
O
O
I
I
I
I
I
I
I
I
I
I
28/21
4/3
4/3
1
1
3
5
1
1
1
1
2
1
3
LVTTL Level Input
LVTTL Level Clock Input
The rising edge is for data strobe.
Positive LVDS Differential Clock Output
Negative LVDS Differential Clock Output
Rising Edge Clock (HIGH), Falling Edge Clock (LOW)
LVTTL Level Power-Down Input
Assertion (LOW) puts the outputs in High Impedance state.
Power Supply Pin for PLL
Ground Pins for PLL
Power Supply Pin for LVDS Output
Ground Pins for LVDS Output
Power Supply Pins for LVTTL Input
Ground pins for LVTTL Input
No Connect
Positive LVDS Differential Data Output
Negative LVDS Differential Data Output
3
Truth Table
H
L
X
Z
F
Note 1: The outputs of the transmitter or receiver will remain in a
High Impedance state until V
Note 2: TxCLKOut
part is powered up, PwrDn is HIGH and the TxCLKIn is a steady logic
level (L/H/Z).
LOW Logic Level
Don’t Care
High Impedance
Floating
Active
Active
HIGH Logic Level
TxIn
F
F
X
Description of Signals
TxCLKIn
Inputs
Active
Active
r
L/H/Z
will settle at a free running frequency when the
F
X
CC
(Note 1)
reaches 2V.
PwrDn
H
H
H
H
L
TxOut
L/H
L/H
www.fairchildsemi.com
L
L
Z
Outputs
r
TxCLKOut
X (Note 2)
X (Note 2)
L/H
L/H
Z
r

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