TDA8261TW Philips Semiconductors, TDA8261TW Datasheet - Page 7

• Manufacturer Part Number: TDA8261TW
• Description: Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer
• Manufacturer: Philips Semiconductors

Philips Semiconductors
PROGRAMMING
Programming of the TDA8261TW is performed via the
I
(address LSB). The TDA8261TW fulfils the I
mode, according to the Philips I
I
The I
I
allow direct connection to most of the existing
microcontrollers. The choice of the threshold voltage for
the I
connected to the supply voltage, to ground or needs an
open-circuit; see Table 1.
Table 1 I
Table 2 I
Notes
1. MSB is transmitted first.
2. X = undefined.
3. Acknowledge bit (A).
2004 Dec 02
2
2
2
GND
Open-circuit
V
Programmable address
Programmable Divider 1 (PD1)
Programmable Divider 2 (PD2)
Control Data 1 (CD1)
Control Data 2 (CD2)
C-bus. The read or write selection is made with bit R/W
C-bus voltage
C-bus system tied to either 2.5, 3.3 or 5.0 V, that will
CC
Satellite Zero-IF QPSK/8PSK
downconverter with PLL synthesizer
2
2
C-bus lines is made with pin BVS that needs to be
C-bus lines SCL and SDA can be connected to an
PIN BVS
2
2
C-bus voltage selection
C-bus write data format
BYTE
2
C-bus specification.
I
2
C-BUS VOLTAGE
MSB
N7
C1
1
0
1
2.5 V
3.3 V
(1)
5 V
2
C-bus fast
N14
N6
C0
T2
1
N13
N5
T1
X
0
7
I
I
After the transmission of the address (first byte), four data
bytes can be sent to fully program the TDA8261TW. The
bus transceiver has an auto-increment facility that permits
to program the TDA8261TW with a single transmission:
one address byte followed by four data bytes (PD1, PD2,
CD1 and CD2).
The TDA8261TW can be partly programmed provided that
the first data byte following the address is PD1 or CD1.
The first bit of the first data byte transmitted indicates
whether PD1 (first bit = 0) or CD1 (first bit = 1) will follow.
Until an I
additional data bytes can be entered without the need to
re-address the device. Each byte is loaded after the
corresponding 8th clock pulse. Programmable divider data
(contents of PD1 and PD2) becomes valid only after the
8th clock pulse of PD2, or after a STOP condition if only
PD1 needs to be programmed.
2
2
C-bus write mode
C-bus write mode: bit R/W = 0; see Table 2.
N12
N4
T0
X
0
BITS
2
C-bus STOP condition is sent by the controller,
(2)
N11
N3
R2
X
0
MA1
N10
N2
R1
X
MA0
N9
N1
R0
X
TDA8261TW
Product specification
LSB
N8
N0
X
X
0
ACK
A
A
A
A
A
(3)