HT48CA0-1 Holtek Semiconductor, HT48CA0-1 Datasheet
HT48CA0-1
Related parts for HT48CA0-1
HT48CA0-1 Summary of contents
Page 1
... General Description The HT48RA0-1/HT48CA0-1 are 8-bit high perfor- mance, RISC architecture microcontroller devices spe- cifically designed for multiple I/O control product applications. The mask version HT48CA0-1 is fully pin and functionally compatible with the OTP version HT48RA0-1 device. Rev. 1.40 HT48RA0-1/HT48CA0-1 ...
Page 2
... Block Diagram www.DataSheet4U.com Pin Assignment Rev. 1.40 HT48RA0-1/HT48CA0-1 2 December 21, 2005 ...
Page 3
... SS 0. +0.3V Operating Temperature........................... Test Conditions Parameter V Conditions DD No load SYS 3V No load, system HALT =0. =0. HT48RA0-1/HT48CA0-1 Description Ta=25 C Min. Typ. Max. Unit 2.0 3.6 V =4MHz 0 ...
Page 4
... SYS SYS Functional Description www.DataSheet4U.com Execution Flow The HT48RA0-1/HT48CA0-1 system clock can be de- rived from a crystal/ceramic resonator oscillator in- ternally divided into four non-overlapping clocks. One instruction cycle consists of four system clock cycles. Instruction fetching and execution are pipelined in such a way that a fetch takes one instruction cycle while de- coding and execution takes the next instruction cycle ...
Page 5
... Program Counter S9~S0: Stack register bits @7~@0: PCL bits Table Location * Table Location @7~@0: Table pointer bits 5 HT48RA0-1/HT48CA0 ...
Page 6
... In addition, on executing the subroutine call, the status register will not be automatically pushed onto the stack. If the contents of the status are important and if the sub- routine can corrupt the status register, precautions must be taken to save it properly. 6 HT48RA0-1/HT48CA0-1 December 21, 2005 ...
Page 7
... The clock source is processed by a frequency divider and a prescaller to yield various time out periods. WDT time out period = Where n= 8~11 selected by code option. Watchdog Timer 7 HT48RA0-1/HT48CA0-1 Function , temperature and the chip DD Clock Source n 2 December 21, 2005 ...
Page 8
... In other words, a dummy cycle period will be inserted after the wake-up. Rev. 1.40 HT48RA0-1/HT48CA0-1 To minimize power consumption, all I/O pins should be carefully managed before entering the HALT status. Reset There are three ways in which a reset can occur: ...
Page 9
... Input/Output ports Stack Pointer Carrier output Carrier The HT48RA0-1/HT48CA0-1 provides a carrier output which shares the pin with PC0. It can be selected carrier output (REM) or level output pin (PC0) by code option. If the carrier output option is selected, setting PC0 enable carrier output and setting PC0 disable it at low level output ...
Page 10
... Input/Output Ports There are an 8-bit bidirectional input/output port, a 6-bit input with 2-bit I/O port and one-bit output port in the HT48RA0-1/HT48CA0-1, labeled PA, PB and PC which are mapped to [12H], [14H], [16H] of the RAM, respec- tively. Each bit of PA can be selected as NMOS output or Schmitt trigger with pull-high resistor by software in- struction ...
Page 11
... Since low voltage has to be maintained in its original state and exceed 1ms, therefore 1ms delay enters the reset mode. Rev. 1.40 The relationship between V ) has to remain in their LVR Low Voltage Reset 11 HT48RA0-1/HT48CA0-1 and V is shown below. DD LVR December 21, 2005 ...
Page 12
... Code Option The following table shows eight kinds of code option in the HT48RA0-1/HT48CA0-1. All the code options must be de- fined to ensure proper system functioning. No. WDT time-out period selection 1 Time-out period= 2 WDT enable/disable selection. This option is to decide whether the WDT timer is enabled or disabled. ...
Page 13
... The following table shows the C value according to different crystal values. (For reference only) 4MHz Crystal 4MHz Resonator 3.58MHz Crystal 3.58MHz Resonator 2MHz Crystal & Resonator 1MHz Crystal 480kHz Resonator 455kHz Resonator 429kHz Resonator Rev. 1.40 Crystal or Resonator 0pF 10pF 0pF 25pF 25pF 35pF 300pF 300pF 300pF 13 HT48RA0-1/HT48CA0-1 C December 21, 2005 ...
Page 14
... Rotate data memory left through carry with result in ACC Rotate data memory left through carry Move data memory to ACC Move ACC to data memory Move immediate data to ACC Clear bit of data memory Set bit of data memory 14 HT48RA0-1/HT48CA0-1 Instruction Flag Cycle Affected 1 Z,C,AC,OV (1) ...
Page 15
... No operation Clear data memory Set data memory Clear Watchdog Timer Pre-clear Watchdog Timer Pre-clear Watchdog Timer Swap nibbles of data memory Swap nibbles of data memory with result in ACC Enter power down mode (2) 15 HT48RA0-1/HT48CA0-1 Instruction Flag Cycle Affected 2 None (2) 1 None (2) ...
Page 16
... The contents of the accumulator and the specified data are added, leaving the result in the accumulator. ACC ACC+x TO PDF Add the accumulator to the data memory The contents of the specified data memory and the accumulator are added. The result is stored in the data memory. [m] ACC+[m] TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 17
... The indicated address is then loaded. Program execution continues with the instruction at this address. Stack Program Counter+1 Program Counter addr TO PDF Clear data memory The contents of the specified data memory are cleared to 0. [m] 00H TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 18
... WDT 00H* PDF and PDF Complement data memory Each bit of the specified data memory is logically complemented (1 s complement). Bits which previously contained a 1 are changed to 0 and vice-versa. [m] [m] TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 19
... PDF Decrement data memory and place result in the accumulator Data in the specified data memory is decremented by 1, leaving the result in the accumula- tor. The contents of the data memory remain unchanged. ACC [ PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 20
... The program counter are replaced with the directly-specified address unconditionally, and control is passed to this destination. Program Counter addr TO PDF Move data memory to the accumulator The contents of the specified data memory are copied to the accumulator. ACC [m] TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 21
... PDF Logical OR data memory with the accumulator Data in the data memory (one of the data memories) and the accumulator perform a bitwise logical_OR operation. The result is stored in the data memory. [m] ACC OR [m] TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 22
... The contents of the specified data memory and the carry flag are rotated 1 bit left. Bit 7 re- places the carry bit; the original carry flag is rotated into the bit 0 position. [m].(i+1) [m].i; [m].i:bit i of the data memory (i=0~6) [m]. [m].7 TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 23
... The contents of the specified data memory and the carry flag are together rotated 1 bit right. Bit 0 replaces the carry bit; the original carry flag is rotated into the bit 7 position. [m].i [m].(i+1); [m].i:bit i of the data memory (i=0~6) [m]. [m].0 TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 24
... If the result is 0, the following instruction, fetched during the current instruction execution, is discarded and a dummy cycle is replaced to get the proper instruction (2 cy- cles). Otherwise proceed with the next instruction (1 cycle). Skip if ([m] 1)=0, ACC ([ PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 25
... If bit i of the specified data memory is not 0, the next instruction is skipped. If bit i of the data memory is not 0, the following instruction, fetched during the current instruction execution, is discarded and a dummy cycle is replaced to get the proper instruction (2 cycles). Other- wise proceed with the next instruction (1 cycle). Skip if [m]. PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 26
... Swap data memory and place result in the accumulator The low-order and high-order nibbles of the specified data memory are interchanged, writ- ing the result to the accumulator. The contents of the data memory remain unchanged. ACC.3~ACC.0 [m].7~[m].4 ACC.7~ACC.4 [m].3~[m].0 TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 27
... Move the ROM code (last page) to TBLH and data memory The low byte of ROM code (last page) addressed by the table pointer (TBLP) is moved to the data memory and the high byte transferred to TBLH directly. [m] ROM code (low byte) TBLH code (high byte) TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 28
... ACC XOR [m] TO PDF Logical XOR immediate data to the accumulator Data in the accumulator and the specified data perform a bitwise logical Exclusive_OR op- eration. The result is stored in the accumulator. The 0 flag is affected. ACC ACC XOR x TO PDF HT48RA0-1/HT48CA0 December 21, 2005 ...
Page 29
... Package Information 24-pin SOP (300mil) Outline Dimensions www.DataSheet4U.com Symbol Rev. 1.40 HT48RA0-1/HT48CA0-1 Dimensions in mil Min. Nom. 394 290 14 590 Max. 419 300 20 614 104 December 21, 2005 ...
Page 30
... SSOP (150mil) Outline Dimensions www.DataSheet4U.com Symbol Rev. 1.40 HT48RA0-1/HT48CA0-1 Dimensions in mil Min. Nom. 228 150 8 335 Max. 244 157 12 346 December 21, 2005 ...
Page 31
... Reel Outer Diameter Reel Inner Diameter Spindle Hole Diameter Key Slit Width Space Between Flange Reel Thickness Description Reel Outer Diameter Reel Inner Diameter Spindle Hole Diameter Key Slit Width Space Between Flange Reel Thickness 31 HT48RA0-1/HT48CA0-1 Dimensions in mm 330 1.0 62 1.5 13.0+0.5 0.2 2.0 0.5 24.8+0.3 0.2 30.2 0.2 Dimensions in mm 330 1.0 62 1.5 13.0+0.5 ...
Page 32
... Description Carrier Tape Width Cavity Pitch Perforation Position Cavity to Perforation (Width Direction) Perforation Diameter Cavity Hole Diameter Perforation Pitch Cavity to Perforation (Length Direction) Cavity Length Cavity Width Cavity Depth Carrier Tape Thickness Cover Tape Width 32 HT48RA0-1/HT48CA0-1 Dimensions in mm 24.0 0.3 12.0 0.1 1.75 0.1 11.5 0.1 1.55+0.1 1.5+0.25 4.0 0.1 2.0 0.1 10.9 0.1 15.9 0.1 3.1 0.1 0.35 0.05 21.3 Dimensions ...
Page 33
... Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.40 HT48RA0-1/HT48CA0-1 33 December 21, 2005 ...