HT48E70 Holtek Semiconductor, HT48E70 Datasheet
HT48E70
Related parts for HT48E70
HT48E70 Summary of contents
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... ROM (MTP) 256 8 data memory EEPROM 224 8 data memory RAM General Description The HT48E70 is an 8-bit high performance, RISC archi- tecture microcontroller device specifically designed for multiple I/O control product applications. The advantages of low power consumption, I/O flexibil- ity, timer functions, oscillator options, HALT and Rev ...
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... Block Diagram Rev. 1.00 HT48E70 2 September 16, 2005 www.DataSheet4U.com ...
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... Pin Assignment Pad Assignment * The IC substrate should be connected to VSS in the PCB layout artwork. Rev. 1.00 HT48E70 3 September 16, 2005 www.DataSheet4U.com ...
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... Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil- ity. Rev. 1.00 Description +6.0V Storage Temperature ............................ 125 C SS +0.3V Operating Temperature........................... HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... DD 0 0.9V DD LVR enabled 2.7 3 =0. =0. =0. =0. September 16, 2005 HT48E70 www.DataSheet4U.com Ta=25 C Max. Unit 5 ...
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... Without WDT prescaler Without WDT prescaler 1024 1 Wake-up from HALT 1024 1 6 September 16, 2005 HT48E70 www.DataSheet4U.com Ta=25 C Unit 4000 kHz 8000 kHz 4000 kHz 8000 kHz 4000 kHz 8000 kHz 168 s 144 SYS ...
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... Functional Description Execution Flow The HT48E70 system clock is derived from either a crystal oscillator and is internally divided into four non-overlapping clocks. One instruction cycle con- sists of four system clock cycles. Instruction fetching and execution are pipelined in such a way that a fetch takes an instruction cycle while de- coding and execution takes the next instruction cycle ...
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... It will not be enabled until the TBLH has been backed up. All table related instructions require two cycles to Table Location * Table Location P12~P8: Current program counter bits 8 HT48E70 www.DataSheet4U.com * September 16, 2005 ...
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... PFC;1DH, PGC;1FH). The general purpose data mem- ory, addressed from 20H to FFH, is used for data and control information under instruction commands. Rev. 1.00 HT48E70 RAM Mapping All of the data memory areas can handle arithmetic, logic, increment, decrement and rotate operations di- rectly. Except for some dedicated bits, each bit in the data memory can be set and reset by SET [m] ...
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... Only the program counter is pushed onto the stack. If the contents of the register or status register (STATUS) are altered by the interrupt service program which corrupts the desired control sequence, the con- or tents should be saved in advance. Function Status (0AH) Register 10 HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... oscillator is used, an external resistor between 08H OSC1 and VDD is required and the resistance must 0CH range from 24k The system clock, divided available on OSC2, which can be used to synchro- nize external logic. The RC oscillator provides the most 11 HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... The system oscillator will be turned off but the WDT oscillator remains running (if the WDT oscillator is se- lected). The contents of the on chip RAM and registers remain unchanged. WDT and WDT prescaler will be cleared and re- counted again (if the WDT clock is from the WDT os- cillator). Watchdog Timer 12 HT48E70 www.DataSheet4U.com Division Ratio 1:1 1:2 1:4 1:8 1:16 1:32 1:64 ...
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... Any wake-up from HALT will en- able the SST delay. Reset Timing Chart Reset Circuit Note: * Make the length of the wiring, which is con- nected to the RES pin as short as possible, to avoid noise interference. Reset Configuration 13 September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... September 16, 2005 HT48E70 www.DataSheet4U.com (HALT)* uu-u u--- uu-u u--- 000H ---- ---u --11 uuuu uuuu ---- ...
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... The event count mode is used to count external events, which means the clock source comes from an external (TMR0/TMR1) pin. The timer mode functions as a normal timer with the clock source coming from the Function TMR0C (0EH) Register Function TMR1C (11H) Register 15 HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... Counter 0/1 reloading will occur at the same time). When the Timer/Event Counter 0/1 (reading TMR0/TMR1) is read, the clock will be blocked to avoid errors. As clock blocking may result in a counting error, this must be taken into consideration by the programmer. Timer/Event Counter 0 Timer/Event Counter 1 16 HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... There is a pull-high option available for all I/O lines (port option). Once the pull-high option of an I/O line is se- lected, the I/O line has a pull-high resistor. Otherwise, the pull-high resistor is absent. It should be noted that a non-pull-high I/O line operating in input mode will cause a floating state. Input/Output Ports 17 HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... Serial data output from EEPROM data memory Rev. 1.00 The relationship between V and the voltage range for proper chip opera- Note: OIR tion at 4MHz system clock. Low Voltage Reset Function EECR (40H) Register 18 HT48E70 www.DataSheet4U.com is shown below. LVR September 16, 2005 ...
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... DO will high state. For successful instructions, CS must be low once after the instruction is sent. After power on, the device is by default in the EWDS state. An EWEN instruction must be performed before any ERASE or WRITE instruction can be exe- cuted. 19 September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... So not necessary to erase data before the WRITE instruction. During the in- ternal writing, we can verify the busy/ready status high. The DO will remain low but when the operation is over, the DO will return to high and further instructions can be executed. 20 HT48E70 www.DataSheet4U.com Ta=25 C Unit MHz ns ns ...
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... SK clock is not re- quired. During the internal write-all operation, we can verify the busy/ready status high. The DO will re- main low but when the operation is over the DO will re- turn to high and further instruction can be executed. 21 September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Write data EWEN Erase/Write Enable EWDS Erase/Write Disable ERAL Erase All WRAL Write All Note: X stands for don t care² Rev. 1.00 Start bit Op Code Address A7~ A7~ A7~ 11XXXXXXX 1 00 00XXXXXXX 1 00 10XXXXXXX 1 00 01XXXXXXX 22 HT48E70 www.DataSheet4U.com Data D7~D0 D7~D0 D7~D0 September 16, 2005 ...
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... PA wake-up (By bit CMOS or Schmitt input 7 PA, PB, PC, PD, PE, PF, PG pull-high enable or disable (By port) 8 BZ/BZ enable or disable 9 BZ/BZ source: TMR0 or TMR1 10 System oscillator crystal 11 WDT enable or disable 12 LVR enable or disable Rev. 1.00 Options /4 or disable SYS /4 SYS /4 SYS 23 HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... Such a low voltage, as mentioned here, is one which is less than the lowest value of the MCU operating voltage. Note however that if the LVR is enabled then R1 can be removed. Rev. 1.00 C1 0pF 10k 0pF 12k 10pF 12k 0pF 10k 25pF 10k 25pF 10k 35pF 27k 300pF 9.1k 300pF 10k 300pF 10k 24 September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Rotate data memory left through carry Data Move MOV A,[m] Move data memory to ACC MOV [m],A Move ACC to data memory MOV A,x Move immediate data to ACC Bit Operation CLR [m].i Clear bit of data memory SET [m].i Set bit of data memory Rev. 1.00 Instruction Description 25 HT48E70 www.DataSheet4U.com Flag Cycle Affected 1 Z,C,AC,OV (1) 1 Z,C,AC,OV 1 Z,C,AC,OV 1 Z,C,AC,OV (1) 1 Z,C,AC,OV ...
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... The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the CLR WDT1 or CLR WDT2 instruction, the TO and PDF are cleared. Otherwise the TO and PDF flags remain unchanged. Rev. 1.00 Instruction Description 26 HT48E70 www.DataSheet4U.com Flag Cycle Affected 2 None (2) 1 None ...
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... Add the accumulator to the data memory Description The contents of the specified data memory and the accumulator are added. The result is stored in the data memory. Operation [m] ACC+[m] Affected flag(s) TO PDF Rev. 1. September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Program Counter+1 Program Counter Affected flag(s) TO PDF CLR [m] Clear data memory Description The contents of the specified data memory are cleared to 0. Operation [m] 00H Affected flag(s) TO PDF Rev. 1. addr HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... Description Each bit of the specified data memory is logically complemented (1 s complement). Bits which previously contained a 1 are changed to 0 and vice-versa. Operation [m] [m] Affected flag(s) TO PDF Rev. 1. September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Data in the specified data memory is decremented by 1, leaving the result in the accumula- tor. The contents of the data memory remain unchanged. Operation ACC [m] 1 Affected flag(s) TO PDF Rev. 1. (ACC.3~ACC.0)+6, AC1=AC (ACC.3~ACC.0), AC1=0 ACC.7~ACC.4+6+AC1,C=1 ACC.7~ACC.4+AC1,C HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... PDF MOV A,[m] Move data memory to the accumulator Description The contents of the specified data memory are copied to the accumulator. Operation ACC [m] Affected flag(s) TO PDF Rev. 1.00 Program Counter addr HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... Data in the data memory (one of the data memories) and the accumulator perform a bitwise logical_OR operation. The result is stored in the data memory. Operation [m] ACC OR [m] Affected flag(s) TO PDF Rev. 1. Program Counter HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... Data in the specified data memory is rotated 1 bit left with bit 7 rotated into bit 0, leaving the rotated result in the accumulator. The contents of the data memory remain unchanged. Operation ACC.(i+1) [m].i; [m].i:bit i of the data memory (i=0~6) ACC.0 [m].7 Affected flag(s) TO PDF Rev. 1.00 Stack Stack Stack HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... The contents of the specified data memory and the carry flag are together rotated 1 bit right. Bit 0 replaces the carry bit; the original carry flag is rotated into the bit 7 position. Operation [m].i [m].(i+1); [m].i:bit i of the data memory (i=0~6) [m]. [m].0 Affected flag(s) TO PDF Rev. 1. September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Otherwise proceed with the next instruction (1 cycle). Operation Skip if ([m] 1)=0, ACC Affected flag(s) TO PDF Rev September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Other- wise proceed with the next instruction (1 cycle). Operation Skip if [m].i 0 Affected flag(s) TO PDF Rev. 1. ([m]+ ([m]+ September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... The low-order and high-order nibbles of the specified data memory are interchanged, writ- ing the result to the accumulator. The contents of the data memory remain unchanged. Operation ACC.3~ACC.0 ACC.7~ACC.4 Affected flag(s) TO PDF Rev. 1. [m].7~[m].4 [m].3~[m]. HT48E70 www.DataSheet4U.com September 16, 2005 ...
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... The low byte of ROM code (last page) addressed by the table pointer (TBLP) is moved to the data memory and the high byte transferred to TBLH directly. Operation [m] ROM code (low byte) TBLH ROM code (high byte) Affected flag(s) TO PDF Rev. 1. September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Logical XOR immediate data to the accumulator Description Data in the accumulator and the specified data perform a bitwise logical Exclusive_OR op- eration. The result is stored in the accumulator. The 0 flag is affected. Operation ACC ACC XOR x Affected flag(s) TO PDF Rev. 1. September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Package Information 48-pin SSOP (300mil) Outline Dimensions Symbol Min. A 395 B 291 613 Rev. 1.00 Dimensions in mil Nom. Max. 420 299 12 637 September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... QFP (14´20) Outline Dimensions Symbol Min. A 18.80 B 13.90 C 24.80 D 19. 2. 1.15 K 0.10 0 Rev. 1.00 Dimensions in mm Nom. Max. 19.20 14.10 25.20 20.10 1 0.40 3.10 3.40 0.10 1.45 0. September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Product Tape and Reel Specifications Reel Dimensions SSOP 48W Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.00 Dimensions in mm 330 1.0 100 0.1 13.0+0.5 0.2 2.0 0.5 32.2+0.3 0.2 38.2 0.2 42 September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K1 Cavity Depth K2 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.00 Dimensions in mm 32.0 0.3 16.0 0.1 1.75 0.1 14.2 0.1 2.0 Min. 1.5+0.25 4.0 0.1 2.0 0.1 12.0 0.1 16.20 0.1 2.4 0.1 3.2 0.1 0.35 0.05 25.5 43 September 16, 2005 HT48E70 www.DataSheet4U.com ...
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... Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.00 44 September 16, 2005 HT48E70 www.DataSheet4U.com ...