AN1177 STMicroelectronics, AN1177 Datasheet
AN1177
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AN1177 Summary of contents
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... MCU is off-line and not involved while memory is being programmed. For IAP, the MCU partici- pates in programming the memory, which is important for sys- tems that must be online while updating firmware. Often, ISP is well suited for manufacturing, while IAP is appropriate for field AN1177 1/26 ...
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... AN1177 - APPLICATION NOTE updates. PSD8XX devices are capable of both ISP and IAP. Keep in mind that IAP can only program the memory sections of the PSD and not the configuration and programmable logic portions. With ISP, the entire PSD can be erased or programmed. The IAP Problem Typically, a host computer downloads firmware into an embedded flash system through a communication channel that is controlled by the MCU ...
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... The FlashLINK™ cable and PSDsoft Express software are available in a kit from the website www.st.com/ psd . Figure 3 gives a block diagram of the PSD813F for your reference. 128 KByte Flash Optional 32 KByte P51XA Optional 2KByte SRAM Programmable Logic I/O Channel Embedded System AN1177 - APPLICATION NOTE 1,2 PSD813F JTAG EEPROM/Flash System I/O AI03327B 3/26 ...
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... AN1177 - APPLICATION NOTE Figure 3. Top Level Block Diagram of PSD8xx PSD813F PHYSICAL CONNECTIONS Connect your P51XA to the PSD8XX as shown in Figure 4. The same connections can be used for all of the members of the PSD8XX family except the PSD835G2, which has more I/O. The JTAG programming channel, SRAM with battery backup, LCD module, and MCU I/O connections are all optional. ...
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... A15 ADIO11 43 A16 ADIO12 44 A17 ADIO13 45 A18 ADIO14 46 A19 ADIO15 47 WR\ CNTL0 50 RD\ CNTL1 49 PSEN\ CNTL2 10 ALE PD0-ALE 9 PD1-CLKIN 8 PD2-CSi\ 48 RST\ RESET\ AN1177 - APPLICATION NOTE 29 PA0 28 PA1 27 PA2 25 PA3 24 PA4 23 PA5 22 PA6 21 PA7 7 PB0 6 PB1 5 PB2 4 PB3 3 PB4 2 PB5 52 PB6 51 PB7 ...
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... AN1177 - APPLICATION NOTE Figure 5. Memory Map, Simple P51XA/PSD813FX Design F:FFFF Not to Scale 2:FFFF Boot from Here 0:8000 Optional Boot Flash/EEPROM (csboot3/ees3--8 Kbytes) 0:6000 Optional Boot Flash/EEPROM (csboot2/ees2--8 Kbytes) 0:4000 Optional Boot Flash/EEPROM (csboot1/ees1--8 Kbytes) 0:2000 Optional Boot Flash/EEPROM (csboot0/ees0--8 Kbytes) 0:0000 Note the following about the sample memory map shown in Figure broken up into sixteen 64 KByte segments ...
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... Based on the above selections, the “Bus Width”, “Bus Mode”, and “ALE/AS Active Level” will be set automatically. Set the main Flash memory to “Data Space Only” and the secondary Flash memory to “Program Space Only”. This is what the screen should look like after you’ve made the selections: AN1177 - APPLICATION NOTE 7/26 ...
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... AN1177 - APPLICATION NOTE Now you have your project established based on a PSD813F2 and a P51XA. However, there are many other MCU/MPUs you could have chosen in place of the P51XA and still have use of this document. Click OK and the “Design Parameters” window will appear. ...
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... However, later, you will see how the Page Register can be used for general logic inputs to the PLD. Click Next >> when finished. Chip Select Equations. Use this screen to enter chip-select equations to match your memory map. The entry for the PSD SRAM (rs0) is shown below. AN1177 - APPLICATION NOTE 9/26 ...
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... AN1177 - APPLICATION NOTE Use the following table to fill in the rest of the Chip Select equations: Table 1. Chip Select Segment csiop fs0 fs1 fs2 fs3 fs4 fs5 fs6 fs7 csboot0 csboot1 csboot2 csboot3 10/26 Hexadecimal Start Address 01800 10000 14000 18000 1C000 20000 24000 ...
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... Click OK and you will see the Design Flow again. Next, we need to fit the design to silicon. Fitting the Design to Silicon. To fit the design to silicon, click the Fit Design to Silicon box in the De- sign Flow. PSDsoft Express will compile and synthesize the design and create part of the program data AN1177 - APPLICATION NOTE 11/26 ...
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... AN1177 - APPLICATION NOTE file (.obj) that will later be programmed into the PSD813F2 silicon. When this process is complete, a report will pop up that shows the resulting pin assignments PSD usage. This is the fitter report, which you can use to document your design. Since you created a project from scratch, you might receive a fitter error. If this is the case, you should check the PSDsoft Express User Manual for further instructions ...
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... ST JTAG/ISP box in the Design Flow window. You will be prompted for the number of devices in the JTAG chain on your circuit board. Make the appropriate selection and click OK. This document assumes only ™ JTAG cable to program the PSD. ™ ™ . Connect the FlashLINK AN1177 - APPLICATION NOTE cable to your PC’s parallel port. Click the 13/26 ...
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... AN1177 - APPLICATION NOTE one device is in the JTAG chain. If you have more than one device, refer to the PSDsoft Express User Manual . For single device JTAG chains, the window will look similar to the following one: To use this window, ensure that the correct programming data file and PSD device appear in Step 1. For Step 2, select the desired operation, the regions of the PSD that the operation affects, and the number of JTAG pins ( use on the circuit board ...
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... PSD during IAP so, with the “Page Register Defini- tion” tab clicked in the “Design Assistant” screen, make the following addition: for pgr7, click the “logic” checkbox and type “swap” in the “Name of Logic Signal” column. This bit will be used in the chip select AN1177 - APPLICATION NOTE 15/26 ...
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... AN1177 - APPLICATION NOTE equations to implement memory swapping (as shown in the next subsection). This bit can be modified at runtime by writing to its location in the Page Register within the CSIOP address space. See the PSD8XX Family Data Sheet for details. When you have made the addition, your screen should look like this: Modify the Chip Select Equations ...
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... Continue to modify csboot1 and fs7 according to the following screen captures: The steps outlined in Sections 3.2.6 to 3.2.9 can be repeated for the Enhanced Design Example at this time. For Section 3.2.10, when mapping the P51XA firmware in the Address Translate utility of PSDsoft AN1177 - APPLICATION NOTE 17/26 ...
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... AN1177 - APPLICATION NOTE Express for this second design example, you still do not need to specify any Hex file for the PSD main Flash memory area. You only need to specify the P51XA linker file(s) for the secondary Flash memory area (as in the first simple design) because the P51XA will execute code from secondary Flash memory and download to main Flash memory ...
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... Program Space Unmapped Not KBytes Scale Unmapped 160 KBytes Not to Scale swap = 0 VM Register = 12h AN1177 - APPLICATION NOTE Data Space F:FFFF Unmapped KBytes 2:FFFF Main Flash Memory FS7 16 KBytes FLASH 2:C000 Main Flash Memory FS6 16 KBytes FLASH 2:8000 ...
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... AN1177 - APPLICATION NOTE Figure 7. Memory Map After Moving the Main Flash Memory to Program Space F:FFFF Not to Scale 2:FFFF Main Flash Memory FS7 2:C000 Main Flash Memory FS6 2:8000 Main Flash Memory FS5 2:4000 Main Flash Memory FS4 2:0000 Main Flash Memory FS3 ...
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... KBytes FLASH 16 KBytes FLASH 16 KBytes FLASH 16 KBytes FLASH 16 KBytes FLASH Unmapped 32 KBytes Not to Scale 16 KBytes FLASH swap = 0 VM Register = 06h AN1177 - APPLICATION NOTE Data Space F:FFFF Unmapped KBytes 2:FFFF Unmapped 185.75 KBytes 0:1900 PSD Control Register (CSIOP) 256 Bytes 0:1800 ...
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... AN1177 - APPLICATION NOTE Figure 9. Memory Map After Moving the Boot Flash Memory to Data Space F:FFFF Not to Scale 2:FFFF 2:C000 Main Flash Memory FS6 2:8000 Main Flash Memory FS5 2:4000 Main Flash Memory FS4 2:0000 Main Flash Memory FS3 1:C000 Main Flash Memory FS2 ...
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... PSD813F3 or PSD813F5). This memory map assumes you have downloaded the main Flash memory with the FlashLINK cable or you have booted from a separate PROM and have downloaded the Flash memory using the MCU. In either case, you must change your design to account for the different segment locations. AN1177 - APPLICATION NOTE 23/26 ...
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... AN1177 - APPLICATION NOTE Figure 10. Memory Map for a PSD813F Device (with No Secondary Boot Memory) F:FFFF Not to Scale 2:FFFF 2:0000 Main Flash Memory FS7 1:C000 Main Flash Memory FS6 1:8000 Main Flash Memory FS5 1:4000 Main Flash Memory FS4 1:0000 Main Flash Memory FS3 ...
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... Table 2. Document Revision History Date Rev. Nov-2000 2.0 Document written in the WSI format 30-Oct-2001 3.0 Document converted to the ST format AN1177 - APPLICATION NOTE Description of Revision 25/26 ...
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... AN1177 - APPLICATION NOTE For current information on PSD products, please consult our pages on the world wide web: If you have any questions or suggestions concerning the matters raised in this document, please send them to the following electronic mail addresses: ask.memory@st.com Please remember to include your name, company, location, telephone number and fax number. ...