DS90C383 National Semiconductor, DS90C383 Datasheet - Page 14

• Manufacturer Part Number: DS90C383
• Description: +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz/ +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz
• Manufacturer: National Semiconductor

www.national.com
RxIN+
RxIN−
RxOUT
RxCLK IN+
RxCLK IN−
FPSHIFT OUT
PWR DOWN
V
GND
PLL V
PLL GND
LVDS V
LVDS GND
NC
DS90CF384 64 ball FBGA package Pin Description — FPD Link Receiver
Applications Information
The DS90C383 and DS90CF384 are backward compatible
with the existing 5V FPD Link transmitter/receiver pair
(DS90CR583, DS90CR584, DS90CF583 and DS90CF584).
To upgrade from a 5V to a 3.3V system the following must be
addressed:
1. Change 5V power supply to 3.3V. Provide this supply to
2. The DS90C383 (transmitter) incorporates a rise/fall
3. The DS90C383 transmitter input and control inputs ac-
CC
Pin Name
the V
and receiver devices. This change may enable the re-
moval of a 5V supply from the system, and power may
be supplied from an existing 3V power source.
strobe select pin. This select function is on pin 17, for-
merly a V
rise/fall strobe select pin is connected to V
configured with a rising edge strobe. In a system cur-
rently using a 5V rising edge strobe transmitter
(DS90CR583), no layout changes are required to ac-
commodate the new rise/fall select pin on the 3.3V
transmitter. The V
the device will be configured with a rising edge strobe.
When converting from a 5V falling edge transmitter
(DS90CF583) to the 3V transmitter a minimal board
layout change is necessary. The 3.3V transmitter will
not be configured with a falling edge strobe if V
mains connected to the select pin. To guarantee the
3.3V transmitter functions with a falling edge strobe pin
17 should be connected to ground OR left unconnected.
When not connected (left open) and internal pull-down
resistor ties pin 17 to ground, thus configuring the trans-
mitter with a falling edge strobe.
cept 3.3V TTL/CMOS levels. They are not 5V tolerant.
CC
CC
CC
, LVDS V
CC
connection on the 5V products. When the
I/O
O
O
I
I
I
I
I
I
I
I
I
I
I
CC
CC
and PLL V
No.
signal may remain at pin 17, and
28
4
4
1
1
1
1
4
5
1
2
1
3
6
Positive LVDS differentiaI data inputs.
Negative LVDS differential data inputs.
TTL level data outputs. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines — FPLINE,
FPFRAME, DRDY (also referred to as HSYNC, VSYNC, Data Enable).
Positive LVDS differential clock input.
Negative LVDS differential clock input.
TTL Ievel clock output. The falling edge acts as data strobe. Pin name RxCLK OUT.
TTL level input. When asserted (low input) the receiver outputs are low.
Power supply pins for TTL outputs.
Ground pins for TTL outputs.
Power supply for PLL.
Ground pin for PLL.
Power supply pin for LVDS inputs.
Ground pins for LVDS inputs.
Pins not connected.
CC
of both the transmitter
CC
, the part is
CC
re-
14
Description