STS11NF3LL ST Microelectronics, STS11NF3LL Datasheet

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STS11NF3LL

Manufacturer Part Number
STS11NF3LL
Description
N-CHANNEL PowerMESH MOSFET
Manufacturer
ST Microelectronics
Datasheet

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STS11NF3LL
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DESCRIPTION
This application specific Power Mosfet is the third
generation of STMicroelectronics unique ”Single
Feature Size ” strip-based process. The resul-
ting transistor shows the best trade-off between
on-resistance and gate charge. When used as
high and low side in buck regulators, it gives the
best performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high effi-
ciency are of paramount importance.
APPLICATIONS
ABSOLUTE MAXIMUM RATINGS
( ) Pulse width limited by safe operating area
May 2000
STS11NF3LL
Symb ol
OPTIMISED FOR HIGH EFFICIENCY CPU
CORE DC/DC CONVERTERS FOR MOBILE
PCs
I
TYPICAL R
OPTIMAL R
CONDUCTION LOSSES REDUCED
SWITCHING LOSSES REDUCED
SPECIFICALLY DESIGNED AND
V
DM
V
V
P
DGR
I
DS
GS
D
tot
TYPE
( )
LOW GATE CHARGE STripFET
Drain-source Voltage (V
Drain- gate Voltage (R
G ate-source Voltage
Drain Current (continuous) at Tc = 25
Drain Current (continuous) at T
Drain Current (pulsed)
T otal Dissipation at T
DS(on)
DS(on)
V
30 V
= 0.011
DSS
x Q
g
TRADE-OFF @ 4.5V
< 0.011
Parameter
R
@ 4.5V
DS(on)
c
GS
N-CHANNEL 30V - 0.009
= 25
GS
= 20 k )
= 0)
o
C
c
11 A
= 100
I
D
o
C
o
C
INTERNAL SCHEMATIC DIAGRAM
POWER MOSFET
Value
2.5
30
30
11
44
STS11NF3LL
SO-8
7
15
- 11A SO-8
PRELIMINARY DATA
Un it
W
V
V
V
A
A
A
1/6

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STS11NF3LL Summary of contents

Page 1

... Drain Current (pulsed otal Dissipation tot Pulse width limited by safe operating area May 2000 INTERNAL SCHEMATIC DIAGRAM = 100 STS11NF3LL - 11A SO-8 POWER MOSFET PRELIMINARY DATA SO-8 Value 2.5 W 1/6 ...

Page 2

... STS11NF3LL THERMAL DATA R (*)Thermal Resistance Junction-ambient thj -amb T Maximum Operating Junction T emperature j T Storage Temperature s tg (*) Mounted on FR-4 board (t sec) ELECTRICAL CHARACTERISTICS (T OFF Symbo l Parameter V Drain-source (BR)DSS Breakdown Voltage I Zero Gate Voltage DSS Drain Current ( Gate-body Leakage GSS Current ( ...

Page 3

... (Resistive Load, see fig.3) Test Con ditions di/dt = 100 150 (Resistive Load, see fig.5) STS11NF3LL Min. Typ. Max. Unit Min. Typ. Max. Unit Min. ...

Page 4

... STS11NF3LL Fig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 Fig. 2: Unclamped Inductive Waveform Fig. 4: Gate Charge test Circuit ...

Page 5

... MIN. TYP 0 0.65 b 0.35 b1 0. 4.8 E 5.8 e 1.27 e3 3.81 F 3 inch MAX. MIN. TYP. 1.75 0.25 0.003 1.65 0.85 0.025 0.48 0.013 0.25 0.007 0.5 0.010 45 (typ.) 5.0 0.188 6.2 0.228 0.050 0.150 4.0 0.14 1.27 0.015 0.6 8 (max.) STS11NF3LL MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 0.196 0.244 0.157 0.050 0.023 0016023 5/6 ...

Page 6

... STS11NF3LL Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice ...

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