SPC122A-nnnnV-C Sunplus Technology Co., Ltd., SPC122A-nnnnV-C Datasheet - Page 2

• Manufacturer Part Number: SPC122A-nnnnV-C
• Description: SOUND CONTROLLER WITH 128KB FLASH MEMORY
• Manufacturer: Sunplus Technology Co., Ltd.

FUNCTION DESCRIPTIONS
1. CPU
The CPU of SPC122A is a high performance 8-bit processor
equipped with Accumulator, Program Counter, X Register, Stack
pointer and Processor Status Register (the same as the 6502
instruction structure). The maximum CPU speed is up to 6MHz.
2. OSCILLATOR
The SPC122A supports AT-cut parallel resonant oscillated Crystal /
Resonator or RC Oscillator or external clock sources.
options can be selected through bonding option (select one from
those three types). The design of application circuit should follow
the vendors’ specifications or recommendations if necessary. The
diagrams listed below are typical X’TAL/ROSC circuits for most
applications:
3. BONDING OPTION
The SPC122A has the following bonding option:
4. ROM AREA
The SPC122A provides a 128K-byte of Flash ROM that can be
defined as the program area, audio data area, or both. To access
ROM, users should program the BANK SELECT Register, choose
bank, and access address to fetch data. The combination of CE
and Burn pins is capable of programming the Flash ROM as
parallel mode.
program the Flash ROM as serial mode. In addition, pin AD17
and CE can be used to extend the memory from 128K to 256K
with external memory.
© Sunplus Technology Co., Ltd.
Supports Crystal Resonator or Rosc (with bonding option).
(a) Crystal or
XI/R
20 pf
Ceramic Resonator
Connections
SPC122A
In contrast, using CE and SPOP pins can
XO
20 pf
V
DD
Rosc
(b) RC Oscillator
XI/R
Connections
SPC122A
XO
The OSC
Preliminary
PAGE 2
5. RAM AREA
The total RAM size is 128 bytes (including Stack), located from $80
through $FF.
6. MAP OF MEMORY AND I/Os
7. MULTI-DUTY CYCLE MODE
The SPC122A offers three unique output waveforms, 1/2, 1/3, and
1/4 duty cycles. The Control Register should be configured to
select 1/2, 1/3, or 1/4 duty cycle and the IOA2 should be
programmed as the multi-duty cycle output port. Programmers
can use the combinations of these duty cycles for remote-control
purpose.
8. POWER SAVING MODE
The SPC122A provides a power savings mode (Standby mode) for
those applications that require very low stand-by current. To enter
standby mode, the Wake-Up Register should be enabled and then
stop the CPU clock by writing the STOP CLOCK Register.
CPU will then go to the stand-by mode. In such a mode, RAM
and I/Os will remain in their previous states CPU wakes up. Port
IOD7 - 0 is the only wake-up source in the SPC122A.
*INT SOURCE:
*NMI SOURCE:
*I/O PORT:
- Capable of being extended to 256K with external memory
- INTA (from TIMER A)
- INTB (from TIMER B)
- CPU CLK / 1024
- CPU CLK / 8192
- CPU CLK / 65536
- EXT INT
- INTA (from TIMER A)
1/2 duty cycle
- I/O CONFIG $0000
1/3 duty cycle
- PORT IOA $0002
1/4 duty cycle
1/2, 1/3, 1/4 Duty Cycle Outputs
Clock
IOB
IOC
IOD
$0003
$0004
$0005
$0001
$000FF
$1FFFF
$08000
$00000
$00080
$00600
*MEMORY MAP (From ROM view)
SUNPLUS TEST PROGRAM
USER RAM and STACK
USER'S PROGRAM &
HW register, I/Os
SPC122A
ROM BANK #0
DATA AREA
UNUSED
DEC. 20, 2000
Version: 0.7
After the
The