ST93CS47 STMicroelectronics, ST93CS47 Datasheet - Page 6

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ST93CS47

Manufacturer Part Number
ST93CS47
Description
(ST93CS46 / ST93CS47) 1K 64 x 16 SERIAL MICROWIRE EEPROM
Manufacturer
STMicroelectronics
Datasheet

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ST93CS46, ST93CS47
POWER-ON DATA PROTECTION
In order to prevent data corruption and inadvertent
write operations during power up, a Power On
Reset (POR) circuit resets all internal programming
circuitry and sets the device in the Write Disable
mode. When V
device is properlyreset (in the Write Disable mode)
and is ready to decode and execute an incoming
instruction. A stable V
any logic signal.
INSTRUCTIONS
The ST93CS46/47 has eleven instructions, as
shown in Table 6. Each instruction is preceded by
the rising edge of the signal applied on the Chip
Select (S) input (assuming that the Clock C is low),
followed by a ’1’ read on D input during the rising
Table 6. Instruction Set
Note: 1. X = don’t care bit.
6/16
Instruction
PRCLEAR
PRWRITE
PAWRITE
PRREAD
WRALL
WRITE
READ
PREN
PRDS
WEN
WDS
Read Data from Memory
Write Data to Memory
Page Write to Memory
Write All Memory
Write Enable
Write Disable
Protect Register Read
Protect Register Write
Protect Register Clear
Protect Register Enable
Protect Register Disable
CC
reaches its functional value, the
Description
CC
must be applied before
Pin
’1’
’1’
’1’
’1’
’1’
’1’
’1’
’1’
W
X
X
X
(1)
PRE
Pin
’0’
’0’
’0’
’0’
’0’
’0’
’1’
’1’
’1’
’1’
’1’
edge of the clock C. The op-codes of the instruc-
tions are made up of the 2 following bits. Some
instructions use only these first two bits, others use
also the first two bits of the address field to define
the op-code. The address field is six bits long
(A5-A0).
The ST93CS46/47 is fabricated in CMOS technol-
ogy and is therefore able to run from zero Hz (static
input signals) up to the maximum ratings (specified
in Table 5).
Read
The Read instruction (READ) outputs serial data
on the Data Output (Q). When a READ instruction
is received, the instruction and address are de-
coded and the data from the memory is transferred
into an output shiftregister. A dummy ’0’ bit is output
first followed by the 16 bit word with the MSB first.
Code
Op
10
01
00
00
00
10
01
00
00
11
11
Address
XXXXXX
01XXXX
11XXXX
00XXXX
11XXXX
000000
111111
A5-A0
A5-A0
A5-A0
A5-A0
(1)
Q15-Q0
D15-D0
D15-D0
D15-D0
Q8-Q0
Data
Write is executed if
the address is not
inside the Protected
area
Write is executed if
all the addresses
are not inside the
Protected area
Write all data if the
Protect Register is
cleared
Data Output =
Protect Register
content + Protect
Flag bit
Data above
specified address
A5-A0 are protected
Protect Flag is also
cleared (cleared
Flag = 1)
OTP bit is set
permanently
Information
Additional

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