LT1619 Linear Technology, LT1619 Datasheet - Page 5

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LT1619

Manufacturer Part Number
LT1619
Description
Low Voltage Current Mode PWM Controller
Manufacturer
Linear Technology
Datasheet

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BLOCK DIAGRA
PI FU CTIO S
S/S (Pin 1): Shutdown and Synchronization. Shutdown is
active low with a typical threshold voltage of 0.9V. For
normal operation, the S/S pin is tied to V
synchronize the controller, drive the S/S pin with pulses.
FB (Pin 2): The inverting Input of the Error Amplifier.
Connect the resistor divider tap here. Set V
to V
V
the output of the transconductance amplifier. Overall loop
is compensated with an RC network from this pin to the
ground.
GND (Pin 4): Ground. Connect to local ground plane.
S/S 1
1.24V
FB
C
(Pin 3): Compensation Pin for the Error Amplifier. V
U
OUT
2
= 1.24(1 + R1/R2). See Figure 1.
+
U
g
m
SYNC
SHUTDOWN
AMPLIFIER
ERROR
DELAY
RAMP COMP
OSCILLATOR
300kHz
U
+
REF/BIAS
V
3
C
1.8V
+
W
V
+
V
B
8
IN
C1
CLK
+
+
A1
A2
IN
. To externally
OUT
UVLO
COMPARATOR
Figure 2. LT1619 Block Diagram
CURRENT
according
LIMIT
S
R
C
Q
is
+
SENSE (Pin 5): The Input of the Current Sense Amplifier.
The SENSE pin is connected to the source of the N-channel
MOSFET and to a sense resistor to the ground. The current
limit threshold is internally set at 53mV, giving a maximum
switch current of 53mV/R
GATE (Pin 6): The Output of the MOSFET Driver.
DRV (Pin 7): The Pull-Up Supply of the MOSFET Driver. Tie
this pin to V
the converter output for bootstrapped operation.
V
bypassed to the ground plane.
IDLE
IN
I
LIM
(Pin 8): Supply or Battery Input. Must be closely
CURRENT
SENSE
AMP
IN
(Pin 8) for nonbootstrapped operation or to
+
BLANKING
LEADING
DRIVER
280ns
EDGE
DRV
7
SENSE
.
4
6
5
GATE
SENSE
GND
1619 F02
V
IN
R
LT1619
SENSE
1619fa
LOAD
5

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