LT1910 Linear Technology, LT1910 Datasheet - Page 8

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LT1910

Manufacturer Part Number
LT1910
Description
Protected High Side MOSFET Driver
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
LT1910
supply at the same point as the positive end of the sense
resistor.
The drain sense threshold voltage has a positive tempera-
ture coefficient, allowing PTC sense resistors to be used
(see Printed Circuit Board Shunts). The selection of R
should be based on the minimum threshold voltage:
Thus the 0.02 drain sense resistor in Figure 3 will yield
a minimum trip current of 2.5A. This simple configuration
is appropriate for resistive or inductive loads that do not
generate large current transients at turn-on.
Automatic Restart Period
The timing capacitor C
length of time the power MOSFET is held off following a
current limit trip. Curves are given in the Typical Perfor-
mance Characteristics to show the restart period for
various values of C
50ms restart period.
Defeating Automatic Restart
Some applications are required to remain off after a fault
occurs. When the LT1910 is being driven from CMOS
logic, this can be easily implemented by connecting resis-
tor R2 between the IN and TIMER pins as shown in
Figure 4. R2 supplies the sustaining current for an internal
SCR which latches the TIMER pin LOW under a fault
condition. The FAULT pin is set active LOW when the
TIMER pin falls below 3.3V. This keeps the MOSFET gate
from turning ON and the FAULT pin from resetting HIGH
8
R
Figure 4. Latch-Off Configuration (Autorestart Defeated)
S
= 50mV/I
LOGIC
CMOS
5V
SET
ON = 5V
OFF = 0V
U
T
FAULT OUTPUT
. For example, C
T
shown in Figure 3 determines the
U
5V
R2
2k
R1
5.1k
3
4
2
W
CT
1 F
FAULT
IN
TIMER
T
LT1910
= 0.33 F yields a
GND
1
1910 F04
U
S
until the IN pin has been recycled. C
FAULT pin from glitching whenever the IN pin recycles to
turn on the MOSFET unsuccessfully under an existing fault
condition.
Inductive vs Capacitive Loads
Turning on an inductive load produces a relatively benign
ramp in MOSFET current. However, when an inductive
load is turned off, the current stored in the inductor needs
somewhere to decay. A clamp diode connected directly
across each inductive load normally serves this purpose.
If a diode is not employed, the LT1910 clamps the MOSFET
gate 0.7V below ground. This causes the MOSFET to
resume conduction during the current decay with (V
V
Capacitive loads exhibit the opposite behavior. Any load
that includes a decoupling capacitor will generate a cur-
rent equal to C
With large electrolytic capacitors, the resulting current
spike can play havoc with the power supply and false trip
the current sense comparator.
Turn-on V/ t is controlled by the addition of the simple
network shown in Figure 5. This network takes advantage
of the fact that the MOSFET acts as a source follower
during turn-on. Thus the V/ t on the source can be
controlled by controlling the V/ t on the gate.
GS
+ 0.7V) across it, resulting in high dissipation peaks.
LT1910
GND
Figure 5. Control and Current Limit Delay
SENSE
1
GATE
50 F
V
50V
LOAD
+
C2
8
6
5
+
• ( V/ t) during capacitor in-rush.
V/ t CONTROL NETWORK
DELAY NETWORK
CURRENT LIMIT
100k
R1
C
1N4148
D
R
1N4148
D
100k
( 10k)
C1
R2
T
is used to prevent the
+
24V
Q1
IRFZ34
R
0.01
15V
1N4744
S
C
1910 F05
sn1910 1910fs
LOAD
+
+

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