LTC1384 Linear Technology, LTC1384 Datasheet - Page 5

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LTC1384

Manufacturer Part Number
LTC1384
Description
5V Low Power RS232 Transceiver with 2 Receivers Active in Shutdown
Manufacturer
Linear Technology
Datasheet

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SWITCHI G TI E WAVEFOR S
PI FU CTIO S
V
with a 0.1 F ceramic capacitor.
GND: Ground Pin.
ON/OFF: TTL/CMOS Compatible Shutdown Pin. A logic
low puts the device in the Shutdown mode independent of
the EN pin. The supply current of the device drops to 35 A
(two receivers alive) and both driver outputs are forced
into three-state.
EN: TTL/CMOS Compatible Receiver Enable Pin. A logic
high forces the receiver outputs into three-state. A logic
low enables the receiver outputs.
V
2V. This pin requires an external capacitor C = 0.1 F for
charge storage. The capacitor may be tied to ground or
V
a common capacitor. For large numbers of devices, in-
creasing the size of the shared common storage capaci-
tors is recommended to reduce ripple.
V
– 2V). This pin requires an external capacitor C = 0.1 F for
charge storage.
OUTPUT
DRIVER
DRIVER
CC
CC
INPUT
+
: Positive Supply Output (RS232 Drivers). V
: Negative Supply Output (RS232 Drivers). V
U
: 5V Input Supply Pin. This pin should be decoupled
. With multiple devices, the V
t
LHD
Figure 1. Driver Propagation Delay Timing
1.4V
U
U
0V
U
W
+
and V
1.4V
pins may share
t
HLD
+
W
– (2V
0V
2V
LTC1384 • F01
CC
V
0V
V
V
CC
CC
+
C1
pins require two external capacitors C = 0.1 F: one from
C1
charge pump efficiency, the capacitor’s effective series
resistance should be less than 2 .
TR IN: RS232 Driver Input Pins. Inputs are TTL/CMOS
compatible. The inputs of unused drivers can be left
unconnected since 300k input pull-up resistors to V
included on chip. To minimize power consumption, the
internal driver pull-up resistors are disconnected from V
in the Shutdown mode.
TR OUT: Driver Outputs at RS232 Voltage Levels. Outputs
are in a high impedance state when in the Shutdown or V
= 0V. The driver outputs are protected against ESD to
RX IN: Receiver Inputs. These pins can be forced to 25V
without damage. The receiver inputs are protected against
ESD to 10kV for human body model discharges. Each
receiver provides 0.4V of hysteresis for noise immunity.
RX OUT: Receiver Outputs with TTL/CMOS Voltage Lev-
els. A logic high at EN puts the outputs into three-state.
OUTPUT
10kV for human body model discharges.
INPUT
+
+
, C1
RX
RX
to C1
t
LHR
Figure 2. Receiver Propagation Delay Timing
, C2
and another from C2
+
, C2
1.7V
0.8V
: Commutating Capacitor Inputs. These
+
to C2
1.3V
LTC1384
. To maintain
t
HLR
2.4V
CC
LTC1384 • F02
5
are
V
0V
V
0V
CC
CC
CC
CC

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