LTC1435A Linear Technology, LTC1435A Datasheet - Page 15

• Manufacturer Part Number: LTC1435A
• Description: High Efficiency Low Noise Synchronous Step-Down Switching Regulator
• Manufacturer: Linear Technology

APPLICATIONS
conduct during double battery operation, but must still
clamp the input voltage below breakdown of the converter.
Although the LTC1435A has a maximum input voltage of
36V, most applications will be limited to 30V by the
MOSFET BV
Design Example
As a design example, assume V
22V(max), V
and C
Referring to Figure 3, a 4.7 H inductor falls within the rec-
ommended range. To check the actual value of the ripple
current the following equation is used:
The highest value of the ripple current occurs at the maxi-
mum input voltage:
The lowest duty cycle also occurs at maximum input volt-
age. The on-time during this condition should be checked
to make sure it doesn’t violate the LTC1435A’s minimum
on-time and cause cycle skipping to occur. The required on-
time at V
The I
of I
at 43% ripple is about 235ns. Therefore, the minimum on-
time is sufficient and no cycle skipping will occur.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Siliconix Si4412DY results in:
R
age with T(estimated) = 50 C:
DS(ON)
R
C
t
MAX
ON MIN
OSC
SENSE
I
I
L
L
OSC
L
(
. From Figure 7, the LTC1435A minimum on-time
was previously calculated to be 1.3A, which is 43%
= 1.37(10
= 0.042 , C
IN(MAX)
250
V
can immediately be calculated:
)
= 100mV/3A = 0.033
f L
OUT
DSS
OUT
kHz
1 6
V
.
.
IN MAX
= 1.6V, I
is:
1–
(
V
4
4 7
V
)/250 – 11 = 43pF
OUT
.
U
RSS
V
V
OUT
)
IN
H
= 100pF. At maximum input volt-
MAX
INFORMATION
f
U
1
–
= 3A and f = 250kHz, R
1 6
22
22
.
IN
V
V
V
= 12V(nominal), V
. 1 6
W
250
V
1 3
. A
kHz
U
291
SENSE
ns
IN
=
The most stringent requirement for the synchronous
N-channel MOSFET occurs when V
cuit). In this case the worst-case dissipation rises to:
With the 0.033 sense resistor I
increasing the Si4412DY dissipation to 950mW at a die tem-
perature of 105 C.
C
temperature. C
output ripple. The output ripple in continuous mode will be
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1435A. These items are also illustrated graphically in
the layout diagram of Figure 10. Check the following in your
layout:
1. Are the signal and power grounds segregated? The
2. Does the V
3. Are the SENSE
IN
V
LTC1435A signal ground pin must return to the (–) plate
of C
bottom N-channel MOSFET, anode of the Schottky di-
ode, and (–) plate of C
lengths as possible.
resistors? The resistive divider R1, R2 must be con-
nected between the (+) plate of C
The 100pF capacitor should be as close as possible to
the LTC1435A.
minimum PC trace spacing? The filter capacitor between
SENSE
the LTC1435A.
P
P
is chosen for an RMS current rating of at least 1.5A at
MAIN
SYNC
ORIPPLE
OUT
. The power ground connects to the source of the
+
2 5 22
1 6
22
and SENSE
.
= R
.
I
SC AVG
OSENSE
V
V
OUT
ESR
3 1
–
V
and SENSE
is chosen with an ESR of 0.03 for low
2
( I
1 85
.
pin connect directly to the feedback
L
2
–
) = 0.03 (1.3A) = 39mV
IN
3
should be as close as possible to
1
0 005 50
, which should have as short lead
A
.
100
+
R
leads routed together with
pF
DS ON
SC(AVG)
OUT
OUT
C
250
and signal ground.
LTC1435A
= 0 (i.e. short cir-
25
kHz
= 4A will result,
C
0 042
88
P-P
.
15
mW