LTC2704 Linear Technology, LTC2704 Datasheet - Page 18

• Manufacturer Part Number: LTC2704
• Description: Voltage Output SoftSpan DACs
• Manufacturer: Linear Technology

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APPLICATIO S I FOR ATIO
LTC2704
Voltage Output/Feedback and Compensation
The LTC2704 provides separate voltage output and feed-
back pins for each DAC. This allows compensation for
resistance between the output and load, or a current
boosting stage such as an LT1970 may be inserted with-
out affecting accuracy. When OUTx is connected directly
Figure 4. DC752 Analog Ground Layer. No Currents are Returned
to this Plane, so it May be Used as a Reference Point for Precise
Voltage Measurements
18
FROM COUPLING INTO ANALOG GROUND PLANE. NOTE
THAT THERE IS A PLANE IN THIS REGION ON LAYER 3
AGND UNDER LTC2704
CUTOUT PREVENTS DIGITAL RETURN CURRENTS
SEPARATED FROM
GND1 TRACE,
ALLOWS GROUNDING TO PROTOTYPE CIRCUITS
EXPOSED GROUND PLANE AROUND EDGE
Figure 3. DC752 Top Layer
U
U
W
AGND UNDER LTC2704
SEPARATED FROM
GND2 TRACE,
U
2704 F04
2704 F03
to RFBx and no additional capacitance is present, the
internal frequency compensation is sufficient for stability
and is optimized for fast settling time. If a low bandwidth
booster stage is used, then a compensation capacitor
from OUTx to C1x may be required. Similarly, extra com-
pensation may be required to drive a heavy capacitive load.
Figure 5. DC752A Load Return, Power Return and Digital Return
RETURN CURRENTS FLOW
V
IN THIS REGION WHEN
OUTA
JP8 IS SET TO “TIE”
AND V
Figure 6. DC752A Routing, Bypass
OUTB
LOAD
CURRENTS FLOW IN THIS REGION
POWER AND LOAD RETURN
DIGITAL RETURN CURRENTS
SMALL GROUND POUR ALLOWS
LOW IMPEDANCE BYPASSING
FLOW IN THIS REGION
OF V
RETURN CURRENTS FLOW
+
V
IN THIS REGION WHEN
OUTC
AND V
JP9 IS SET TO “TIE”
AND V
–
OUTD
LOAD
2704 F06
2704 F05
2704f