LTC2954 Linear Technology, LTC2954 Datasheet - Page 9

• Manufacturer Part Number: LTC2954
• Description: Push Button On/Off Controller
• Manufacturer: Linear Technology

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APPLICATIO S I FOR ATIO
Description
The LTC2954 is a push button On/Off controller that pro-
vides control of system power via a push button interface.
An enable output toggles system power while an interrupt
output provides debounced push button status. The inter-
rupt output can be used in menu driven applications to
request a system power down. A power kill input allows
a microprocessor or system to release the enable output,
effectively powering down the system. Independently ad-
justable On and Off timers allow dependable push button
control of the enable output and resistance to accidental
toggling of system power.
The length of time the push button input (  P  B ) must be held
low in order to toggle the enable (EN/  E  N ) output on and
off is independently adjustable with external capacitors
at the ONT/PDT pins, respectively. During normal opera-
tion, the interrupt output (  I  N  T ) is asserted 32ms after  P  B
goes low.  I  N  T then tracks  P  B until either  P  B or EN/  E  N is
released. See Timing Diagrams on page 8.
The  K  I  L  L input is used to immediately release the enable
output. During a normal power down sequence,  I  N  T re-
quests a system power down. The µP then performs its
housekeeping tasks and then sets  K  I  L  L low. If the µP fails
to set  K  I  L  L low, the user can force a system shutdown
by pressing and holding the push button until the PDT
timer expires.
Turn On
When power is first applied to the LTC2954, the part ini-
tializes the output pins. Any DC/DC converters connected
to the EN/  E  N pin will therefore be held off. To assert the
enable output,  P  B must be held low for a minimum of
32ms (t
debounce time (t
to the ONT pin. The following equation describes the ad-
ditional time that  P  B must be held low before asserting the
enable output. C
Once the enable output is asserted, any DC/DC converters
connected to this pin are turned on. The  K  I  L  L input from
the µP is ignored during a succeeding 512ms blanking
time (t
C
ONT
 K  I  L  L
= 1.56 × 10
DB
,
,
ON
ON BLANK
). The LTC2954 provides additional turn on
ONT
ONT
-4
U
) via an optional capacitor connected
is the ONT external capacitor (µF):
). This blanking time represents the
[μF/ms] • (t
U
ONT
W
– 1ms)
U
maximum time required to power up the DC/DC converter
and the µP. If  K  I  L  L is not brought high during this 512ms
time window, the enable output is released. The assump-
tion is that 512ms is sufficient time for the system to
power up.
Turn Off
To initiate a power down sequence, assert the  I  N  T output
low by pressing the push button for a minimum of 32ms
(t
request to the µP. The µP would then perform power down
and housekeeping tasks and assert  K  I  L  L low when done.
This in turn releases the enable output, thus shutting off
system power.
Adjustable Power Down Timer
The LTC2954 provides a failsafe feature that allows the
user to turn off system power (via  P  B ) under system fault
conditions. For cases when the µP fails to respond to the
interrupt signal, the user can force an immediate power
down by pressing and holding down the push button. The
length of time that  P  B must be held low is given by a fixed
internal 64ms delay (t
down timer delay (t
The adjustable delay is set by placing an optional external
capacitor on the PDT pin. Use the following equation to
calculate the capacitance for the desired delay. C
PDT external capacitor (µF):
C
Simplified Power On/Off Sequence
Figure 1 shows a simplified LTC2954-1 power on and power
off sequence. A high to low transition on  P  B (t
power on sequence. In order to assert the enable output,
the  P  B pin must stay low continuously (  P  B high resets
timers) for a time controlled by the default 32ms and the
external ONT capacitor (t
an internal 512ms blanking timer is started. This blanking
timer is designed to give sufficient time for the DC/DC
converter to reach its final voltage, and to allow the µP
enough time to perform power on tasks.
The  K  I  L  L pin must be pulled high within 512ms of the EN
pin going high. Failure to do so results in the EN pin going
PDT
DB,OFF
= 1.56 × 10
). The interrupt signal serves as a power down
-4
[µF/ms] • (t
PDT
PD,Min
, see timing diagram on page 8).
2
–t
1
) plus an adjustable power
). Once EN goes high (t
PDT
– 1ms)
LTC2954
1
) initiates the
PDT
is the
9
2954f
2
),