LTC6242 Linear Technology, LTC6242 Datasheet

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LTC6242

Manufacturer Part Number
LTC6242
Description
(LTC6240 - LTC6242) CMOS Op Amps
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S
FEATURES
TYPICAL APPLICATIO
0.1Hz to 10Hz Noise: 550nV
Input Bias Current:
Low Offset Voltage: 125µV Max
Low Offset Drift: 2.5µV/°C Max
Gain Bandwidth Product: 18MHz
Output Swings Rail-to-Rail
Supply Operation:
Low Input Capacitance
H Grade Temperature Range: –40°C to 125°C
Single LTC6240 in 5-Pin SOT-23 Package and
8-Pin SO for PCB Guard Ring
Dual LTC6241 in 8-Pin SO and Tiny DFN Packages
Quad LTC6242 in 16-Pin SSOP and 5mm × 3mm
DFN Packages
Photo Diode Amplifi ers
Charge Coupled Amplifi ers
Low Noise Signal Processing
Medical Instrumentation
High Impedance Transducer Amplifi er
Low Noise Single-Ended Input to Differential Output Amplifi er
0.2pA (Typ at 25°C)
1pA Max (LT6240)
2.8V to 6V LTC6240/LTC6241/LTC6242
2.8V to ±5.5V LTC6240HV/LTC6241HV/LTC6242HV
V
IN
10pF
200k
R1
C2
+
LTC6241
U
1/2
10pF
C1
10pF
C4
P-P
4.99k
200k
R3
R2
U
10pF
+
C3
LTC6241
+2.5V
–2.5V
1/2
4.99k
R4
6241 TA01a
V
V
OUT
OUT
Low Noise, Rail-to-Rail Output,
+
DESCRIPTIO
The LTC
low noise, low offset, rail-to-rail output, unity gain stable
CMOS op amps that feature 1pA of input bias current. Input
bias current is guaranteed to be 1pA max on the single
LTC6240. The 0.1Hz to 10Hz noise of only 550nV
with an offset of just 125µV are signifi cant improvements
over traditional CMOS op amps. Additionally, noise is
guaranteed to be less than 10nV/√Hz at 1kHz. An 18MHz
gain bandwidth, and 10V/µs slew rate, along with the wide
supply range and low input capacitance, make them perfect
for use as fast signal processing amplifi ers.
These op amps have an output stage that swings within
30mV of either supply rail to maximize the signal dynamic
range in low supply applications. The input common mode
range extends to the negative supply. They are fully speci-
fi ed on 3V and 5V, and an HV version guarantees operation
on supplies up to ±5V.
The LTC6240 is available in the 8-pin SO and the 5-pin
SOT-23 packages. The LTC6241 is available in the 8-pin
SO, and for compact designs it is packaged in a tiny dual
fi ne pitch leadless (DFN) package. The LTC6242 is avail-
able in the 16-Pin SSOP as well as the 5mm × 3mm DFN
package.
All other trademarks are the property of their respective owners.
LTC6240/LTC6241/LTC6242
Single/Dual/Quad 18MHz,
, LTC and LT are registered trademarks of Linear Technology Corporation.
®
6240/6241/LTC6242 are single, dual and quad
60
50
40
30
20
10
0
1
Noise Voltage vs Frequency
U
10
CMOS Op Amps
FREQUENCY (Hz)
100
1k
T
V
V
10k
A
S
CM
= 25°C
= ±2.5V
= 0V
6241 TA01b
100k
P-P
, along
624012fc
1

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LTC6242 Summary of contents

Page 1

... The LTC6240 is available in the 8-pin SO and the 5-pin SOT-23 packages. The LTC6241 is available in the 8-pin SO, and for compact designs it is packaged in a tiny dual fi ne pitch leadless (DFN) package. The LTC6242 is avail- able in the 16-Pin SSOP as well as the 5mm × 3mm DFN package. ...

Page 2

... JMAX JA – UNDERSIDE METAL CONNECTED TO V (PCB CONNECTION OPTIONAL (Note 1) Specifi ed Temperature Range (Note 3) LTC6240C/LTC6241C/LTC6242C .............. 0°C to 70°C LTC6240I/LTC6241I/LTC6242I ............. –40°C to 85°C + – + 0.3V – 0.3V) LTC6240H/LTC6241H/LTC6242H ....... –40°C to 125°C Junction Temperature ........................................... 150°C DHC, DD Package ............................................. 125°C Storage Temperature Range ....................– ...

Page 3

... ORDER PART NUMBER DHC PART MARKING* LTC6242CDHC 6242 LTC6242HVCDHC 6242HV LTC6242IDHC 6242 LTC6242HVIDHC 6242HV ORDER PART NUMBER GN PART MARKING LTC6242CGN 6242 LTC6242HVCGN 6242HV LTC6242IGN 6242I LTC6242HVIGN 242HVI LTC6242HGN 6242H LTC6242HVHGN 242HVH PACKAGE PART MARKING SOT-23 LTCRR SO-8 6240 SOT-23 LTCRS ...

Page 4

... LTC6240HVC/I, LTC6241C/I, LTC6241HVC/I, LTC6242C/I, CONDITIONS LTC6241 S8 0°C to 70°C –40°C to 85°C LTC6242 GN 0°C to 70°C –40°C to 85°C LTC6240 0° ...

Page 5

... I Supply Current per Amplifi GBW Gain Bandwidth Product SR Slew Rate (Note 11) FPBW Full Power Bandwidth (Note 12) t Settling Time s LTC6240/LTC6241/LTC6242 (LTC6240C/I, LTC6240HVC/I, LTC6241C/I, LTC6241HVC/I, LTC6242C/I, CONDITIONS f = 1kHz Common Mode f = 100kHz ● Guaranteed by CMRR ● 0V ≤ V ≤ 3.5V CM ● ...

Page 6

... Channel-to-Channel (Note 5) Minimum Supply Voltage (Note 10) I Short-Circuit Current SC I Supply Current per Amplifi GBW Gain Bandwidth Product 6 (LTC6240C/I, LTC6240HVC/I, LTC6241C/I, LTC6241HVC/I, LTC6242C/I, CONDITIONS LTC6241 S8 ● 0°C to 70°C ● –40°C to 85°C LTC6242 GN ● 0°C to 70°C ● ...

Page 7

... LTC6242 GN ● 0°C to 70°C ● –40°C to 85°C LTC6241 DD, LTC6242 DHC ● 0°C to 70°C ● –40°C to 85°C ● LTC6241, LTC6242 ● LTC6240 ● ...

Page 8

... S GBW Gain Bandwidth Product SR Slew Rate (Note 11) FPBW Full Power Bandwidth (Note 12) t Settling Time s (LTC6240H/LTC6240HVH, LTC6241H/LTC6241HVH, LTC6242H/LTC6242HVH) The to 125°C, otherwise specifi cations are at T SYMBOL PARAMETER V Input Offset Voltage (Note Match Channel-to-Channel (Note 5) LTC6241 S8 OS www.DataSheet4U.com ...

Page 9

... I Supply Current per Amplifi GBW Gain Bandwidth Product SR Slew Rate (Note 11) FPBW Full Power Bandwidth (Note 12) (LTC6240H/LTC6240HVH, LTC6241H/LTC6241HVH, LTC6242H/LTC6242HVH) The to 125°C, otherwise specifi cations are at T SYMBOL PARAMETER V Input Offset Voltage (Note 4) OS www.DataSheet4U.com V Match Channel-to-Channel (Note 5) LTC6241 S8 ...

Page 10

... Input Bias Current (Notes Input Offset Current (Notes Input Voltage Range CM CMRR Common Mode Rejection CMRR Match Channel-to-Channel (Note 5) A Large Signal Voltage Gain VOL 10 (LTC6240H/LTC6240HVH, LTC6241H/LTC6241HVH, LTC6242H/LTC6242HVH) CONDITIONS No Load I = 1mA SINK No Load I = 1mA SOURCE V = 2. LTC6241, LTC6242 ...

Page 11

... Use proper ESD handling precautions. Note 5: Matching parameters are the difference between the two amplifi ers A and D and between B and C of the LTC6242; between the two amplifi ers of the LTC6241. CMRR and PSRR match are defi ned as follows: CMRR ...

Page 12

... LTC6240/LTC6241/LTC6242 W TYPICAL PERFOR A CE CHARACTERISTICS V Distribution LTC6241 ±2. SO-8 PACKAGE –70 –50 –30 – INPUT OFFSET VOLTAGE (µV) V Distribution LTC6240 ±2. www.DataSheet4U.com 0 –110 –90 –70 –50 –30 – INPUT OFFSET VOLTAGE (µV) ...

Page 13

... 1k 500Ω CONDITIONS: SEE NOTE –55 –35 – 105 125 TEMPERATURE (°C) LTC6240/LTC6241/LTC6242 U Output Saturation Voltage vs Load Current (Output Low 5V 25° 125° 0.01 0.001 115 125 0 ...

Page 14

... LTC6240/LTC6241/LTC6242 W TYPICAL PERFOR A CE CHARACTERISTICS Channel Separation vs Frequency 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 10k 100k 1M 10M FREQUENCY (Hz) Minimum Supply Voltage 100 25° – –55°C A – 125°C A – ...

Page 15

... FREQUENCY (Hz) Series Output Resistance and Overshoot vs Capacitive Load 60 50 – ±2. – 100 CAPACITIVE LOAD (pF) LTC6240/LTC6241/LTC6242 U Noise Voltage vs Frequency 100 FREQUENCY (Hz) 6241 G27 Series Output Resistance and Overshoot vs Capacitive Load 60 50 – ...

Page 16

... LTC6240/LTC6241/LTC6242 W TYPICAL PERFOR A CE CHARACTERISTICS Maximum Undistorted Output Signal vs Frequency – 25° ± < –40dBc 10k 100k 1M FREQUENCY (Hz) Distortion vs Frequency –30 = ±2. – OUT P-P –50 – 1k, 2ND L – ...

Page 17

... Zero-Drift amplifi ers might be inappropriate due to their charge injection. In the frequency region above 1kHz the LTC6240/LTC6241/ LTC6242 also show good noise voltage performance. In this frequency region, noise can easily be dominated by the total source resistance of the particular application. Specifi cally, these amplifi ers exhibit the noise of a 3.1kΩ ...

Page 18

... LTC6242 – 1k 10Ω + 1/4 LTC6242 – 1k 10Ω Figure 3. Parallel Amplifi er Lowers Noise Half the Noise The circuit shown in Figure 3 can be used to achieve even lower noise voltage. By paralleling 4 amplifi ers the noise voltage can be lowered by √4, or half as much noise. The ...

Page 19

... A guard ring around the high-impedance input traces driven by a low-impedance LTC6240/LTC6241/LTC6242 W U source equal to the input voltage prevents such leakage problems ...

Page 20

... LTC6240/LTC6241/LTC6242 U U APPLICATIO S I FOR ATIO 0.1µ 1/2 LTC6241 – 1000pF R6 20k 1 LT6650 5 2 1µ 1µF DIGITAL INPUTS GAIN V = (V1 – V2) GAIN + V OUT • REF – –2 ...

Page 21

... METAL FILM RESISTOR = LTC201 QUAD = LSK389 = LINEAR INTEGRATED SYSTEMS FREMONT, CA LTC6240/LTC6241/LTC6242 W U with the input chopper, proper amplitude and polarity information is presented to A2, the DC output amplifi er. This stage integrates the square wave into a DC voltage, providing the output. The output is divided down (R2 and R1) and fed back to the input chopper where it serves as a zero signal reference ...

Page 22

... LTC6240/LTC6241/LTC6242 U U APPLICATIO S I FOR ATIO The noise measured over a 50 second interval, in Figure 10, is 40nV in a 0.1Hz to 10Hz bandwidth.This low noise is at- tributed to the input JFET’s die size and current density. VERT = 20nV/DIV HORIZ = 5s/DIV Figure 10. Noise in a 0.1Hz to 10Hz Bandwidth Low Noise Shock Sensor Amplifi ...

Page 23

... PHOTODIODE www.DataSheet4U.com Figure 13. 1M Transimpedance Amplifi er with 43nV/√Hz Output Noise LT1019-2.5 LTC6240/LTC6241/LTC6242 achieving an output swing of 50V before attenuation, the circuit provides an output swing to 5V after attenu- ation. The 10M resistor sets the gain of the TIA stage and has a noise density of 400nV/√ ...

Page 24

... LTC6240/LTC6241/LTC6242 PACKAGE DESCRIPTIO 3.50 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 TOP MARK (SEE NOTE 6) 0.200 REF www.DataSheet4U.com .007 – .0098 (0.178 – 0.249) .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3 ...

Page 25

... PACKAGE DESCRIPTIO 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS www.DataSheet4U.com LTC6240/LTC6241/LTC6242 U DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) 0.675 ±0.05 PIN 1 TOP MARK PACKAGE (NOTE 6) OUTLINE 0.200 REF NOTE: 1 ...

Page 26

... LTC6240/LTC6241/LTC6242 PACKAGE DESCRIPTIO 0.62 MAX 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.20 BSC DATUM ‘A’ 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6 ...

Page 27

... Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC6240/LTC6241/LTC6242 U S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .045 ± ...

Page 28

... LTC6240/LTC6241/LTC6242 TYPICAL APPLICATIO SFH213FA OR EQUIVALENT (≤4pF) LTC6241 Output Noise Spectrum. 1MΩ Resistor Noise Dominates; Ideal Performance 0V 1kHz 10kHz/DIV www.DataSheet4U.com RELATED PARTS PART NUMBER DESCRIPTION LTC1151 ±15V Zero-Drift Op Amp LT1792 Low Noise Precision JFET Op Amp LTC2050 Zero-Drift Op Amp LTC2051/LTC2052 Dual/Quad Zero-Drift Op Amp ...

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