RM5231-150-Q PMC-Sierra Inc, RM5231-150-Q Datasheet - Page 28

• Manufacturer Part Number: RM5231-150-Q
• Description: RM5231 Microprocessor with 32-Bit System Bus Data Sheet Released
• Manufacturer: PMC-Sierra Inc

Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002165, Issue 1
Table 9 Initialization Interface
Table 10 Power Supply
Note
1.
BigEndian
VccOK
ColdReset*
Reset*
ModeClock
ModeIn
VccInt
VccIO
Vss
An "*" at the end of the signal name denotes active low.
Pin Name
Pin Name
Input
Input
Input
Input
Output
Input
Input
Input
Input
Type
Type
Allows the system to change the processor addressing mode without
rewriting the mode ROM.
Vcc is OK
When asserted, this signal indicates to the RM5231 that the 3.3V
power supply has been above 3.0V for more than 100 milliseconds and
will remain stable. The assertion of VccOK initiates the reading of the
boot-time mode control serial stream.
Cold reset
This signal must be asserted for a power on reset or a cold reset.
ColdReset must be de-asserted synchronously with SysClock.
Reset
This signal must be asserted for any reset sequence. It may be
asserted synchronously or asynchronously for a cold reset, or
synchronously to initiate a warm reset. Reset must be de-asserted
synchronously with SysClock.
Boot mode clock
Serial boot-mode data clock output at the system clock frequency
divided by 256.
Boot mode data in
Serial boot-mode data input.
Power supply for core.
Power supply for I/O.
Ground return.
RM5231™ Microprocessor with 32-bit System Bus Data Sheet
Description
Description
Released
28