MX25L1605A MXIC, MX25L1605A Datasheet
MX25L1605A
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MX25L1605A Summary of contents
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... Low standby current: 50uA (max.) - Deep power-down mode 10uA (typical) • Minimum 100,000 erase/program cycles P/N: PM1211 www.DataSheet.in ADVANCED INFORMATION MX25L1605A 16M-BIT [x 1] CMOS SERIAL FLASH SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Block Lock protection - The BP0~BP2 status bit defines the size of the area to be software protected against Program and Erase instructions ...
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... GENERAL DESCRIPTION The MX25L1605A is a CMOS 16,777,216 bit serial Flash memory, which is configured as 2,097,152 x 8 internally. The MX25L1605A features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input ...
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... BLOCK DIAGRAM SCLK P/N: PM1211 www.DataSheet.in Address Generator Data SI Register SRAM Buffer Mode State CS# Logic Machine Clock Generator 3 MX25L1605A Memory Array Page Buffer Y-Decoder Output Sense Amplifier Buffer HV Generator SO REV. 0.01, JUL. 29, 2005 ...
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... Release from Deep Powerdown instruction). P/N: PM1211 www.DataSheet.in MX25L1605A • To avoid unexpected changes by system power supply transition, the Power-On Reset and an internal timer (tPUW) can protect the device. • Before the Program, Erase, and Write Status Register execution, instruction length will be checked on follow- ing the clock pulse number to be multiple of eight base ...
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... MX25L1605A MX25L1605A None Upper 32nd (Block 31) Upper sixteenth (two blocks: 30 and 31) Upper eighth (four blocks 31) Upper quarter (eight blocks 31) Upper half (sixteen blocks 31) All All REV. 0.01, JUL. 29, 2005 ...
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... HOLD operation. If Chip Select (CS#) signal goes high during HOLD operation, it has the effect on resetting the internal logic of the device necessary to drive HOLD# signal to high, and then to drive CS# to low for restarting communication with the device. P/N: PM1211 www.DataSheet.in MX25L1605A Hold Hold Condition Condition ...
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... Erase) Erase) Program) Power Down) D8 Hex Hex B9 Hex C7 Hex AD1 AD1 AD2 AD2 AD3 AD3 7 MX25L1605A WRSR READ Fast Read (write status (read data) (fast read register) data) 01 Hex 03 Hex 0B Hex AD1 AD1 AD2 AD2 AD3 AD3 x ...
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... MX25L1605A Bolck Sector Address Range 239 0EF000h 14 224 0E0000h 223 0DF000h 13 208 0D0000h 207 0CF000h 12 192 0C0000h 191 0BF000h 11 176 ...
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... During the progress of Write Status Register, Program, Erase operation, to access the memory array is neglected and not affect the current operation of Write Status Register, Program, Erase. P/N: PM1211 www.DataSheet.in SCLK SCLK SI MSB SO 9 MX25L1605A MSB REV. 0.01, JUL. 29, 2005 ...
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... RDID operation can use CS# to high at any time during data out. (see Figure. 13) While Program/Erase operation is in progress, it will not decode the RDID instruction, so there's no effect on the cycle of program/erase operation which is currently in progress. When CS# goes high, the device is at standby stage. P/N: PM1211 www.DataSheet.in MX25L1605A 10 REV. 0.01, JUL. 29, 2005 ...
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... BP2 BP1 0 the level of the level of the level of protected protected protected block block (note 1) (note 1) (note 1) 11 MX25L1605A bit 2 bit 1 bit 0 BP0 WEL WIP (write enable (write in progress latch) bit) block 1=write enable 1=write operation 0=not write 0=not in write ...
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... Status Register is Hardware write protected Protected against Page The values in the SRWD, Program, Sector Erase BP2, BP1 and BP0 and Chip Erase bits cannot be changed 12 MX25L1605A Memory Content 1 1 Unprotected Area Ready to accept Page Program and Sector Erase instructions Ready to accept Page ...
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... Address bits [Am-A12] (Am is the most significant address) select the sector address. The sequence of issuing SE instruction is: CS# goes low -> sending SE instruction code-> 3-byte address on SI -> CS# goes high. (see Figure 19) P/N: PM1211 www.DataSheet.in MX25L1605A 13 REV. 0.01, JUL. 29, 2005 ...
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... If less than 256 bytes are sent to the device, the data is programmed at the request address of the page without effect on other address of the same page. The sequence of issuing PP instruction is: CS# goes low-> sending PP instruction code-> 3-byte address on SI-> at least 1-byte on data on SI-> CS# goes high. (see Figure 18) P/N: PM1211 www.DataSheet.in MX25L1605A 14 REV. 0.01, JUL. 29, 2005 ...
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... CS# must remain to high at least tRES2(max). Once in the standby mode, the device waits to be selected can be receive, decode, and execute instruction. The RDP instruction is for releasing from Deep Power Down Mode. P/N: PM1211 www.DataSheet.in MX25L1605A 15 REV. 0.01, JUL. 29, 2005 ...
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... The Manufacturer and Device IDs can be read continuously, alternating from one to the other. The instruction is completed by driving CS# high. Table of ID Definitions: RDID RES REMS P/N: PM1211 www.DataSheet.in manufacturer ID memory type C2 20 manufacturer MX25L1605A memory density 15 electronic ID 14 device ID 14 REV. 0.01, JUL. 29, 2005 ...
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... POWER-ON STATE P/N: PM1211 www.DataSheet.in MX25L1605A 17 REV. 0.01, JUL. 29, 2005 ...
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... During voltage transitions, all pins may overshoot to -0.5V to 4.6V 4.6V or -0.5V for period up to 20ns. 4. All input and output pins may overshoot to VCC+0.5V -0.5V to 4.6V while VCC+0.5V is smaller than or equal to 4.6V. Figure 4. Maximum Positive Overshoot Waveform 20ns 4.6V 3.6V MIN. TYP 18 MX25L1605A 20ns MAX. UNIT CONDITIONS 6 pF VIN = VOUT = 0V REV. 0.01, JUL. 29, 2005 ...
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... Input timing referance level 0.7VCC AC Measurement Level 0.3VCC Note: Input pulse rise and fall time are <5ns DEVICE UNDER TEST CL 6.2K ohm CL=30pF Including jig capacitance (CL=15pF Including jig capacitance for 70MHz) 19 MX25L1605A Output timing referance level 0.5VCC 2.7K ohm +3.3V DIODES=IN3064 OR EQUIVALENT REV. 0.01, JUL. 29, 2005 ...
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... VCC+0.4 0.4 VCC-0.2 20 MX25L1605A TEST CONDITIONS uA VCC = VCC Max VIN = VCC or GND uA VCC = VCC Max VIN = VCC or GND uA VIN = VCC or GND CS# = VCC uA VIN = VCC or GND CS# = VCC mA f=70MHz SCLK=0.1VCC/0.9VCC, SO=Open mA f=66MHz SCLK=0.1VCC/0.9VCC, SO=Open ...
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... Value guaranteed by characterization, not 100% tested in production. 3. Expressed as a slew-rate. 4. Only applicable as a constraint for a WRSR instruction when SRWD is set Test condition is shown as Figure 3. P/N: PM1211 www.DataSheet.in MX25L1605A for Commercial grade, VCC = 2.7V ~ 3.6V) @33MHz 30pF @70MHz 15pF or @66MHz 30pF 21 Min. ...
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... Note: 1. These parameters are characterized only. INITIAL DELIVERY STATE The device is delivered with the memory array erased: all bits are set to 1 (each byte contains FFh). The Status Register contains 00h (all Status Register bits are 0). P/N: PM1211 www.DataSheet.in MX25L1605A Min. Max 1.5 ...
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... Figure 7. Serial Input Timing CS# tCHSL SCLK SI SO Figure 8. Write Protect Setup and Hold Timing during WRSR when SRWD=1 WP# tWHSL CS# SCLK SI SO P/N: PM1211 www.DataSheet.in tSLCH tDVCH tCHDX MSB IN High Impedance High Impedance 23 MX25L1605A tSHSL tCHSH tSHCH tCHCL tCLCH LSB IN tSHWL REV. 0.01, JUL. 29, 2005 ...
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... Figure 9. Hold Timing CS# SCLK SO SI HOLD# Figure 10. Output Timing CS# SCLK tCLQV tCLQX SO ADDR.LSB IN SI P/N: PM1211 www.DataSheet.in tHLCH tCHHL tCHHH tHLQZ tCLQV tCLQX 24 MX25L1605A tHHCH tHHQX tCH tCL tSHQZ LSB OUT tQLQH tQHQL REV. 0.01, JUL. 29, 2005 ...
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... SO CS SCLK Instruction SI High Impedance Instruction Manufacturer Identification High Impedance MSB 25 MX25L1605A Device Identification MSB REV. 0.01, JUL. 29, 2005 ...
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... SCLK Instruction SI High Impedance Instruction 24-Bit Address MSB High Impedance 26 MX25L1605A Status Register Out MSB Status Register ...
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... BIT ADDRESS High Impedance Dummy Byte DATA OUT MSB 27 MX25L1605A DATA OUT MSB MSB REV. 0.01, JUL. 29, 2005 ...
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... Data Byte 2 Data Byte MSB MSB 28 MX25L1605A Data Byte MSB Data Byte 256 ...
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... Figure 20. Block Erase (BE) Instruction Sequence CS# SCLK SI Note: BE instruction is D8(hex). P/N: PM1211 www.DataSheet. Instruction 24 Bit Address MSB Instruction 24 Bit Address 23 22 MSB 29 MX25L1605A REV. 0.01, JUL. 29, 2005 ...
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... Instruction Instruction 3 Dummy Bytes MSB 30 MX25L1605A Stand-by Mode Deep Power-down Mode RES2 0 Electronic Signature Out MSB Deep Power-down Mode Stand-by Mode REV ...
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... High Impedance ADD ( Manufacturer MSB 31 MX25L1605A t RES1 Stand-by Mode Device MSB MSB REV. 0.01, JUL. 29, 2005 ...
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... Figure 26. Power-up Timing (max (min P/N: PM1211 www.DataSheet.in Program, Erase and Write Commands are Rejected by the Device Chip Selection Not Allowed tVSL Reset State of the Device tPUW 32 MX25L1605A Read Access allowed Device fully accessible time REV. 0.01, JUL. 29, 2005 ...
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... For AC spec tCHSL, tSLCH, tDVCH, tCHDX, tSHSL, tCHSH, tSHCH, tCHCL, tCLCH in the figure, please refer to "AC CHARACTERISTICS" table. P/N: PM1211 www.DataSheet.in tCHSL tSLCH tDVCH MSB IN High Impedance Figure A. AC Timing at Device Power-Up Parameter VCC Rise Time 33 MX25L1605A tCHSH tCHCL tCHDX tCLCH LSB IN Notes Min. Max. 1 0.5 500000 REV. 0.01, JUL. 29, 2005 ...
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... Input Voltage with respect to GND on ACC Input Voltage with respect to GND on all power pins, SI, CS# Input Voltage with respect to GND on SO Current Includes all pins except VCC. Test conditions: VCC = 3.0V, one pin at a time. P/N: PM1211 www.DataSheet.in MX25L1605A Min. TYP. (1) Max. ( ...
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... ORDERING INFORMATION PART NO. MX25L1605AMC-15 MX25L1605AMC-15G MX25L1605AMI-15 MX25L1605AMI-15G MX25L1605AZMC-15G MX25L1605AZMI-15G MX25L1605AM2C-15 MX25L1605AM2C-15G MX25L1605AM2I-15 MX25L1605AM2I-15G P/N: PM1211 www.DataSheet.in CLOCK OPERATING STANDBY (MHz) CURRENT MAX. CURRENT MAX. (mA MX25L1605A Temperature PACKAGE (uA) 50 0~70 C 16-SOP 50 0~70 C 16-SOP ...
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... OPTION: G: Pb-free blank: normal SPEED: 15: 70MHz, for SPI TEMPERATURE RANGE: C: Commercial (0˚C to 70˚C) I: Industrial (-40˚C to 85˚C) PACKAGE: ZM: SON M: 300mil 16-SOP M2: 200mil 8-SOP DENSITY & MODE: 1605A: 16Mb TYPE DEVICE: 25: Serial Flash 36 MX25L1605A REV. 0.01, JUL. 29, 2005 ...
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... PACKAGE INFORMATION P/N: PM1211 www.DataSheet.in MX25L1605A 37 REV. 0.01, JUL. 29, 2005 ...
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... P/N: PM1211 www.DataSheet.in MX25L1605A 38 REV. 0.01, JUL. 29, 2005 ...
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... P/N: PM1211 www.DataSheet.in MX25L1605A 39 REV. 0.01, JUL. 29, 2005 ...
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... REVISION HISTORY Revision No. Description 0.01 1. Added 8-SOP(200mil) package information 2. Added "Recommended Operating Conditions" P/N: PM1211 www.DataSheet.in MX25L1605A Page P1,2,34,35, JUL/29/2005 P38 P33 40 Date REV. 0.01, JUL. 29, 2005 ...
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... MX25L1605A MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...