MX29LV065 Macronix, MX29LV065 Datasheet

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MX29LV065

Manufacturer Part Number
MX29LV065
Description
64M-Bit CMOS Flash Memory
Manufacturer
Macronix
Datasheet
FEATURES
GENERAL FEATURES
• 8,388,608 x 8 byte structure
• One hundred twenty-eight Equal Sectors with 32K byte
• Sector Protection/Chip Unprotected
• Secured Silicon Sector
• Single Power Supply Operation
• Latch-up protected to 250mA from -1V to Vcc + 1V
• Low Vcc write inhibit is equal to or less than 2.5V
• Compatible with JEDEC standard
PERFORMANCE
• High Performance
• Low Power Consumption
• Minimum 100,000 erase/program cycle
• 20-year data retention
GENERAL DESCRIPTION
The MX29LV065 is a 64-mega bit Flash memory orga-
nized as 8M bytes of 8 bits. MXIC's Flash memories
offer the most cost-effective and reliable read/write non-
volatile random access memory. The MX29LV065 is
packaged in 48-pin TSOP and 63-ball CSP. It is designed
to be reprogrammed and erased in system or in standard
EPROM programmers.
P/N:PM0893
each
- Any combination of sectors can be erased with erase
- Provides sector group protect function to prevent pro
- Provides chip unprotected function to allow code
changing
- Provides temporary sector group unprotected func-
tion for code changing in previously protected sector
groups
- Provides a 256-byte area for code or data that can
- Once this sector is protected, it is prohibited to pro-
- 3.0 to 3.6 volt for read, erase, and program opera-
- Pinout and software compatible to single power sup-
- Fast access time: 90/120ns
- Fast program time: 7us, 42s/chip (typical)
- Fast erase time: 0.9s/sector, 45s/chip (typical)
- Low active read current: 9mA (typical) at 5MHz
- Low standby current: 0.2uA(typ.)
suspend/resume function
gram or erase operation in the protected sector group
be permanently protected.
gram or erase within the sector again.
tions
ply Flash
64M-BIT [8M x 8] CMOS EQUAL SECTOR FLASH MEMORY
1
SOFTWARE FEATURES
• Support Common Flash Interface (CFI)
• Erase Suspend/ Erase Resume
• Status Reply
HARDWARE FEATURES
• Ready/Busy (RY/BY) Output
• Hardware Reset (RESET) Input
PACKAGE
• 63-ball CSP
• 48-pin TSOP
The standard MX29LV065 offers access time as fast as
90ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX29LV065 has separate chip enable (CE) and output
enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
- Flash device parameters stored on the device and
provide the host system to access.
- Suspends sector erase operation to read data from
or program data to another sector which is not being
erased
- Data polling & Toggle bits provide detection of pro-
gram and erase operation completion
- Provides a hardware method of detecting program
and erase operation completion
- Provides a hardware method to reset the internal state
machine to read mode
ADVANCED INFORMATION
MX29LV065
REV. 0.4, JUL. 22, 2003

Related parts for MX29LV065

MX29LV065 Summary of contents

Page 1

... Provides a hardware method to reset the internal state machine to read mode PACKAGE • 63-ball CSP • 48-pin TSOP The standard MX29LV065 offers access time as fast as 90ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29LV065 has separate chip enable (CE) and output enable (OE) controls. ...

Page 2

... In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29LV065 uses a 3.0V to 3.6V VCC sup- ply to perform the High Reliability Erase and auto Pro- gram/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process ...

Page 3

... A13 A15 A16 A17 NC A8 A11 A12 A19 A10 NC A22 NC Q5 RESET A18 MX29LV065 A17 45 GND 44 A20 43 A19 42 A10 VI/O 35 A21 ...

Page 4

... Output Enable Input RESET Hardware Reset Pin, Active Low RY/BY Read/Busy Output VCC +3.0V single power supply VI/O Input/Output buffer (2.7V~3.6V) this input should be tied directly to VCC GND Device Ground NC Pin Not Connected Internally P/N:PM0893 MX29LV065 LOGIC SYMBOL 23 A0-A22 Q0- RESET RY/BY VI REV. 0.4, JUL. 22, 2003 ...

Page 5

... BLOCK DIAGRAM CONTROL CE INPUT OE LOGIC WE ADDRESS LATCH A0-A22 AND BUFFER Q0-Q7 P/N:PM0893 MX29LV065 PROGRAM/ERASE HIGH VOLTAGE MX29LV065 FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 5 WRITE STATE MACHINE (WSM) STATE REGISTER COMMAND DATA DECODER COMMAND DATA LATCH ...

Page 6

... MX29LV065 A16 8-bit Address Range (in hexadecimal) 0 000000-00FFFF 1 010000-01FFFF 0 020000-02FFFF 1 030000-03FFFF 0 040000-04FFFF 1 050000-05FFFF 0 060000-06FFFF 1 070000-07FFFF 0 080000-08FFFF 1 090000-09FFFF 0 0A0000-0AFFFF 1 0B0000-0BFFFF 0 0C0000-0CFFFF 1 0D0000-0DFFFF 0 0E0000-0EFFFF 1 0F0000-0FFFFF 0 100000-10FFFF ...

Page 7

... MX29LV065 A16 8-bit Address Range (in hexadecimal) 0 260000-26FFFF 1 270000-27FFFF 0 280000-28FFFF 1 290000-29FFFF 0 2A0000-2AFFFF 1 2B0000-2BFFFF 0 2C0000-2CFFFF 1 2D0000-2DFFFF 0 2E0000-2EFFFF 1 2F0000-2FFFFF 0 300000-30FFFF 1 310000-31FFFF 0 320000-32FFFF 1 330000-33FFFF 0 340000-34FFFF 1 350000-35FFFF 0 360000-36FFFF ...

Page 8

... MX29LV065 A16 8-bit Address Range (in hexadecimal) 0 4E0000-4EFFFF 1 4F0000-4FFFFF 0 500000-50FFFF 1 510000-51FFFF 0 520000-52FFFF 1 530000-53FFFF 0 540000-54FFFF 1 550000-55FFFF 0 560000-56FFFF 1 570000-57FFFF 0 580000-58FFFF 1 590000-59FFFF 0 5A0000-5AFFFF 1 5B0000-5BFFFF 0 5C0000-5CFFFF 1 5D0000-5DFFFF 0 5E0000-5EFFFF ...

Page 9

... A17 A16 MX29LV065 A15 8-bit Address Range (in hexadecimal) 0 760000-76FFFF 1 770000-77FFFF 0 780000-78FFFF 1 790000-79FFFF 0 7A0000-7AFFFF 1 7B0000-7BFFFF 0 7C0000-7CFFFF 1 7D0000-7DFFFF 0 7E0000-7EFFFF 1 7F0000-7FFFFF REV. 0.4, JUL. 22, 2003 ...

Page 10

... Note: All sector groups are 256K bytes in size. P/N:PM0893 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111 10 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 11

... VCC±0. =12.0±0.5V, X=Don't Care MX29LV065 Address Q0~ (Note High-Z X High-Z X High-Z Sector Addresses A6=L, A1=H, A0=L Sector Addresses A6=H, A1=H, A0 =Address IN, D =Data IN, D =Data OUT IN OUT REV ...

Page 12

... MX29LV065 A9 A15 A16 Q0~ A10 A22 V X X00 C2H 93H Code(1) ID 90h (factory locked) ID 10h (non-factory locked) REV. 0.4, JUL. 22, 2003 ...

Page 13

... P/N:PM0893 MX29LV065 STANDBY MODE MX29LV065 can be set into Standby mode with two dif- ferent approaches. One is using both CE and RESET pins and the other one is using RESET pin only. When using both pins of CE and RESET, a CMOS Standby mode is achieved with both pins held at Vcc ± ...

Page 14

... The un- protected mechanism begins on the falling edge of the WE pulse and is terminated on the rising edge. MX29LV065 also provides another method. Which requires VID on the RESET only. This method can be implemented either in-system or via programming equipment. This method uses standard microprocessor bus cycle timing ...

Page 15

... However, multiplexing high voltage onto address lines is not generally desired system design prac- tice. MX29LV065 provides hardware method to access the silicon ID read operation. Which method requires VID on A9 pin, VIL on CE, OE, A6, and A1 pins. Which apply VIL on A0 pin, the device will output MXIC's manufac- ture code of C2H ...

Page 16

... SA X VID X uct is shipped to the field. The MX29LV065 offers the device with Secured Silicon Sector either factory locked or customer lockable. The factory-locked version is always protected when shipped from the factory , and has the Secured Silicon Sector Indicator Bit permanently set to a "1". The customer- ...

Page 17

... Writing is inhibited by holding any one VIL VIH VIH. To initiate a write cycle CE and WE must be a logical zero while logical one. POWER-UP SEQUENCE The MX29LV065 powers up in the Read only mode. In addition, the memory contents may only be altered after successful completion of the predefined command se- quences. ...

Page 18

... Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table 2 defines the valid register command sequences. Note that the Erase Suspend (B0H) and TABLE 2. MX29LV065 COMMAND DEFINITIONS First Bus Command Bus Cycle ...

Page 19

... Address bits are don't care for this command. The reset command may be written between the P/N:PM0893 MX29LV065 sequence cycles in an erase command sequence before erasing begins. This resets the device to reading array data. Once erasure begins, however, the device ignores reset commands until the operation is complete ...

Page 20

... Q5 to "1" ,” or cause the Data Polling algorithm to indicate the operation was successful. However, a succeeding read will show that the data is still "0". Only erase operations can convert a "0" "1". P/N:PM0893 not required 20 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 21

... See the Erase/Program Operations tables in "AC Char- acteristics" for parameters, and to Figure 16 for timing diagrams. P/N:PM0893 The MX29LV065 contains a Silicon-ID-Read operation to supplement traditional PROM programming method- ology. The operation is initiated by writing the read sili- con ID command sequence into the command register. ...

Page 22

... P/N:PM0893 MX29LV065 QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX29LV065 is capable of operating in the CFI mode. This mode all the host system to determine the manu- facturer of the device such as operating parameters and configuration. Two commands are required in CFI mode. Query command of CFI mode is placed first, then the Reset command exits CFI mode ...

Page 23

... Maximum timeout for maximum size buffer write times (2 Maximum timeout for individual block erase times (2 Maximum timeout for full chip erase times (not supported) P/N:PM0893 N us) N us) N ms Typ Typ Typ) 23 MX29LV065 Address h Data h 10 0051 11 0052 12 0059 13 0002 14 0000 15 0040 16 0000 17 0000 ...

Page 24

... Burst mode type (0=not supported) Page mode type (0=not supported) ACC (Acceleration) Supply Minimum 00h=Not Supported, D7-D4: Volt, D3-D0:100mV ACC (Acceleration) Supply Maximum 00h=Not Supported, D7-D4: Volt, D3-D0:100mV Top/Bottom Boot Sector Flag 02h=Bottom Boot Device, 03h=Top BootnDevice P/N:PM0893 MX29LV065 Address ...

Page 25

... These three bits are discussed first. Q7 Note1 Q7 0 Erase Suspend Read 1 (Erase Suspended Sector) Erase Suspend Read Data (Non-Erase Suspended Sector) Erase Suspend Program MX29LV065 RY/BY Note2 Toggle 0 N Toggle Toggle 0 1 Toggle 0 No ...

Page 26

... Erase Suspend mode. Toggle Bit I may be read at any address, and is valid P/N:PM0893 MX29LV065 after the rising edge of the final WE or CE, whichever happens first pulse in the command sequence (prior to the program or erase operation), and during the sector time-out ...

Page 27

... Q5 will produce a "1". This time-out condition indicates that the program or erase cycle was not suc- cessfully completed. Data Polling and Toggle Bit are the P/N:PM0893 MX29LV065 only operating functions of the device under this condi- tion. If this time-out condition occurs during sector erase op- eration, it specifies that a particular sector is bad and it may not be reused ...

Page 28

... If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the Erase Suspend mode.) If the output is high (Ready), the device is ready to read array data (including during the Erase Suspend mode the standby mode. P/N:PM0893 MX29LV065 28 REV. 0.4, JUL. 22, 2003 ...

Page 29

... Industrial (I) Devices Ambient Temperature ( +125 C V Supply Voltages CC V for full voltage range +2 3 Operating ranges define those limits between which the functionality of the device is guaranteed. 29 MX29LV065 ). . . . . . . . . . . . 0°C to +70° -40° +85° REV. 0.4, JUL. 22, 2003 ...

Page 30

... VCC= VCC max CE= VIL VIH 5 MHz 1 MHz CE CE,RESET=VCC±0.3V RESET=VSS±0.3V VIL = VSS ± 0.3 V, VIH = VCC ± 0.3 V VCC = 3.0 V ± 10% IOL= 4.0mA,VCC=VCC min IOH=-2.0mA,VCC=VCC min 0.85VCC IOH=-100uA,VCC=VCC min 30 MX29LV065 Min Typ Max Unit uA ±1 ±1 ...

Page 31

... Input timing measurement OR EQUIVALENT reference levels Output timing measurement reference levels OUTPUTS Steady Changing from Changing from Changing, State Unknown Center Line is High Impedance State(High Z) Measurement Level 1.5V 1.5V OUTPUT 31 MX29LV065 90 12 Unit 1 TTL gate 30 100 0.0-3.0 V 1.5 V 1.5 V REV. 0.4, JUL. 22, 2003 ...

Page 32

... See SWITCHING TEST CIRCUITS and TEST SPECIFICATIONS TABLE for test specifications. P/N:PM0893 Test Setup Min CE, OE=VIL Max OE=VIL Max Max Max Max Min Read Min Toggle and Min Data Polling 32 MX29LV065 Speed Options 90 12 Unit 90 120 ns 90 120 ns 90 120 ...

Page 33

... VIL VIH WE VIL VIH OE VIL HIGH Z VOH Outputs VOL VIH RESET VIL RY/BY 0V P/N:PM0893 ADD Valid tAH tWP tCWC tCH tDS tDH DIN tRC ADD Valid tCE tRH tRH tOEH tOE tACC DATA Valid 33 MX29LV065 tWPH tDF tOH HIGH Z REV. 0.4, JUL. 22, 2003 ...

Page 34

... Fig 3. RESET TIMING WAVEFORM RY/BY CE, OE RESET Reset Timing NOT during Automatic Algorithms RY/BY CE, OE RESET Reset Timing during Automatic Algorithms P/N:PM0893 Test Setup All Speed Options Unit tRH tRP tReady2 tReady1 tRP 34 MX29LV065 MAX 20 us MAX 500 ns MIN 500 ns MIN 50 ns MIN 0 ns MIN ...

Page 35

... NOTES: 1.SA=sector address(for Sector Erase), VA=Valid Address for reading status data(see "Write Operation Status"). P/N:PM0893 Read Status Data tAS SA xxxh for chip erase tAH tCH tWHWH2 tWPH 55h 30h 10 for Chip Erase tBUSY 35 MX29LV065 Progress Complete tRB REV. 0.4, JUL. 22, 2003 ...

Page 36

... Write Data AAH Address XXXH Write Data 55H Address XXXH Write Data 80H Address XXXH Write Data AAH Address XXXH Write Data 55H Address XXXH Write Data 10H Address XXXH Data Poll from system YES No DATA = FFh ? YES Auto Erase Completed 36 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 37

... Write Data 55H Address XXXH Write Data 80H Address XXXH Write Data AAH Address XXXH Write Data 55H Address XXXH Write Data 30H Sector Address NO Last Sector to Erase ? YES Data Poll from System NO Data=FFh? YES Auto Sector Erase Completed 37 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 38

... Fig 7. ERASE SUSPEND/RESUME FLOWCHART P/N:PM0893 START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H ERASE RESUME Continue Erase Another NO Erase Suspend ? YES 38 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 39

... Fig 8. SECURED SILICON SECTOR PROTECTED ALGORITHMS FLOWCHART Device Failed P/N:PM0893 MX29LV065 START Enter Secured Silicon Sector Wait 1us First Wait Cycle Data=60h Second Wait Cycle Data=60h A6=0, A1=1, A0=0 Wait 300us No Data = 01h ? Yes Write Reset Command Secured Sector Protect Complete 39 REV. 0.4, JUL. 22, 2003 ...

Page 40

... Sector Erase Operation (Note 2) tVCS VCC Setup Time (Note 1) tRB Write Recovery Time from RY/BY tBUSY Program/Erase Valid to RY/BY Delay Notes: 1. Not 100% tested. 2. See the "Erase And Programming Performance" section for more information. P/N:PM0893 MX29LV065 Speed Options 90 Min 90 Min Min Min 45 Min Min ...

Page 41

... WE tCS tDS tDH Data RY/BY tVCS VCC NOTES: 1.PA=Program Address, PD=Program Data, DOUT is the true data the program address P/N:PM0893 Read Status Data (last two cycle) tAS PA tAH tCH tWHWH1 tWPH A0h PD tBUSY 41 MX29LV065 PA PA Status DOUT tRB REV. 0.4, JUL. 22, 2003 ...

Page 42

... CE Pulse Width tCPH CE Pulse Width High tWHWH1 Byte Programming Operation (Note 2) tWHWH2 Sector Erase Operation (Note 2) Notes: 1. Not 100% tested. 2. See the "Erase And Programming Performance" section for more information. P/N:PM0893 MX29LV065 Speed Options 90 Min 90 Min Min 45 Min 45 Min Min ...

Page 43

... P/N:PM0893 PA for program SA for sector erase XXX for chip erase Data Polling tAS tAH tWHWH1 or 2 tCPH tBUSY tDH PD for program A0 for program 55 for erase 30 for sector erase 10 for chip erase 43 MX29LV065 PA DOUT DQ7 REV. 0.4, JUL. 22, 2003 ...

Page 44

... Fig 11. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM0893 MX29LV065 START Write Data AAH Address XXXH Write Data 55H Address XXXH Write Data A0H Address XXXH Write Program Data/Address Data Poll from system No Verify Byte Ok ? YES No Last Address ? YES Auto Program Completed 44 REV ...

Page 45

... VID VIH RESET SA, A6 A1, A0 Sector Group Protect or Chip Unprotect Data 60h 1us Note: For sector group protect A6=0, A1=1, A0=0. For sector group unprotected A6=1, A1=1, A0=0 P/N:PM0893 Valid* Valid* Verify 60h 40h Sector Group Protect:150us Sector Group Unprotect:15ms 45 MX29LV065 Valid* Status REV. 0.4, JUL. 22, 2003 ...

Page 46

... No Reset PLSCNT=1 Increment PLSCNT No Yes No PLSCNT=1000? Yes Device failed Sector Unprotect Algorithm 46 MX29LV065 START PLSCNT=1 RESET=VID Wait 1us First Write No Temporary Sector Unprotect Mode Cycle=60h? Yes All sectors protected? Yes Set up first sector address ...

Page 47

... Fig 14. SECTOR GROUP PROTECT TIMING WAVEFORM (A9, OE Control 12V 3V A9 tVLHT 12V 3V OE tVLHT WE CE Data A21-A16 P/N:PM0893 tWPP 1 tOESP Sector Address 47 MX29LV065 Verify tVLHT 01H F0H tOE REV. 0.4, JUL. 22, 2003 ...

Page 48

... Set Up Sector Addr PLSCNT=1 OE=VID,A9=VID,CE=VIL A6=VIL Activate WE Pulse Time Out 150us Set WE=VIH, CE=OE=VIL A9 should remain VID Read from Sector Addr=SA, A1=1 No Data=01H? Yes Protect Another Sector? Remove VID from A9 Write Reset Command Sector Protection Complete 48 MX29LV065 . REV. 0.4, JUL. 22, 2003 ...

Page 49

... Fig 16. CHIP UNPROTECTED TIMING WAVEFORM (A9, OE Control) A1 12V 3V A9 tVLHT A6 12V 3V OE tVLHT WE CE Data P/N:PM0893 tVLHT tWPP 2 tOESP 49 MX29LV065 Verify 00H F0H tOE REV. 0.4, JUL. 22, 2003 ...

Page 50

... Time Out 15ms Set OE=CE=VIL A9=VID,A1=1 Set Up First Sector Addr Read Data from Device No Data=00H? Yes No All sectors have been verified? Yes Remove VID from A9 Write Reset Command Chip Unprotect Complete 50 MX29LV065 Increment PLSCNT No PLSCNT=1000? Yes Device Failed REV. 0.4, JUL. 22, 2003 ...

Page 51

... RESET Hold Time from RY/BY High for Temporary Sector Group Unprotected Fig 18. TEMPORARY SECTOR GROUP UNPROTECTED WAVEFORMS 12V RESET tVIDR CE WE RY/BY P/N:PM0893 Program or Erase Command Sequence tRSP 51 MX29LV065 Test All Speed Options Unit Setup Min 500 ns Min 4 us Min 4 us VIL or VIH ...

Page 52

... Fig 19. TEMPORARY SECTOR GROUP UNPROTECTED FLOWCHART Temporary Sector Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. P/N:PM0893 Start RESET = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET = VIH VID=11.5V~12.5V 2. All previously protected sectors are protected again. 52 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 53

... Fig 20. SILICON ID READ TIMING WAVEFORM VCC 5V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC A1 VIH VIL VIH ADD VIL CE VIH VIL tCE VIH WE VIL VIH OE VIL VIH DATA VIL Q0-Q7 P/N:PM0893 tACC tOE tOH DATA OUT C2H 53 MX29LV065 tDF tOH DATA OUT 93H REV. 0.4, JUL. 22, 2003 ...

Page 54

... VA=Valid address. Figure shows are first status cycle after command sequence, last status read cycle, and array data raed cycle. P/N:PM0893 VA tDF tOH Complement Status Data True Status Data Status Data True 54 MX29LV065 VA High Z Valid Data High Z Valid Data REV. 0.4, JUL. 22, 2003 ...

Page 55

... Fig 22. Data Polling Algorithm No Notes: 1.VA=valid address for programming. 2.Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM0893 Start Read Q7~Q0 Add.=VA(1) Yes Q7 = Data ? Yes Read Q7~Q0 Add.=VA Yes Q7 = Data ? (2) No FAIL Pass 55 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 56

... VA=Valid address; not required for Q6. Figure shows first two status cycle after command sequence, last status read cycle, and array data read cycle. P/N:PM0893 VA tDF tOH Valid Status Valid Status (first read) (second read) (stops toggling) 56 MX29LV065 VA VA Valid Data Valid Data REV. 0.4, JUL. 22, 2003 ...

Page 57

... Q5 changes to "1". P/N:PM0893 START Read Q7~Q0 Read Q7~Q0 (Note 1) NO Toggle Bit Q6 =Toggle? YES Q5=1? YES (Note 1,2) Read Q7~Q0 Twice Toggle Bit Q6= Toggle? YES Program/Erase Operation Not Program/Erase Operation Complete Complete, Write Reset Command 57 MX29LV065 REV. 0.4, JUL. 22, 2003 ...

Page 58

... Erase NOTES: The system can use toggle Q2/Q6, Q2 toggles only when read at an address within an erase-suspended P/N:PM0893 Enter Erase Suspend Program Erase Suspend Erase Erase Suspend Read Suspend Program 58 MX29LV065 Erase Resume Erase Erase Read Complete REV. 0.4, JUL. 22, 2003 ...

Page 59

... Parameter Description CIN Input Capacitance COUT Output Capacitance CIN2 Control Pin Capacitance Notes: 1. Sampled, not 100% tested. 2. Test conditions TA=25° C, f=1.0MHz DATA RETENTION Parameter Minimum Pattern Data Retention Time P/N:PM0893 MX29LV065 LIMITS MIN. TYP.(2) MAX. 0 150 42 126 100,000 MIN. ...

Page 60

... ORDERING INFORMATION PLASTIC PACKAGE PART NO. ACCESS TIME (ns) MX29LV065TC-90 90 MX29LV065TC-12 120 MX29LV065XBC-90 90 MX29LV065XBC-12 120 MX29LV065TI-90 90 MX29LV065TI-12 120 MX29LV065XBI-90 90 MX29LV065XBI-12 120 P/N:PM0893 MX29LV065 Ball Pitch/ PACKAGE Ball size 48 Pin TSOP (Normal Type) 48 Pin TSOP (Normal Type) 0.8mm/0.3mm 63 Ball CSP 0.8mm/0.3mm 63 Ball CSP ...

Page 61

... PACKAGE INFORMATION P/N:PM0893 MX29LV065 61 REV. 0.4, JUL. 22, 2003 ...

Page 62

... P/N:PM0893 MX29LV065 62 REV. 0.4, JUL. 22, 2003 ...

Page 63

... To modify Package Information 0.3 1. Removed ACC function and relate information 2. Removed unlock bypass / WP information 3. To added Industrial information 3. Corrected the CFI table 0 modified the max. ICC current from 5uA to 15uA P/N:PM0893 MX29LV065 Page All P3,60~62 All P62 All All P29,30,32,40,60 P23,24 ...

Page 64

... TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 ACRONIX MERICA, NC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com C L O., TD. MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. MX29LV065 ...

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