MX29LV640DT Macronix International, MX29LV640DT Datasheet
MX29LV640DT
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MX29LV640DT Summary of contents
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FEATURES GENERAL FEATURES • 8,388,608 4,194,304 x 16 switchable • Sector Structure - 8KB(4KW and 64KB(32KW) x 127 • Extra 128-word sector for security - Features factory locked and identifiable, and customer lockable • ...
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PACKAGE • 44-Pin SOP • 48-Pin TSOP • 48-Ball LFBGA • All Pb-free devices are RoHS Compliant PIN CONFIGURATION 44 SOP 44 A21 2 43 A18 3 42 A17 ...
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PIN DESCRIPTION SYMBOL PIN NAME A0~A21 Address Input Q0~Q14 Data Inputs/Outputs Q15/A-1 Q15(Word Mode)/LSB addr(Byte Mode) CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input RESET# Hardware Reset Pin, Active Low BYTE# Word/Byte Selection Input WP#/ACC ...
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BLOCK DIAGRAM CE# OE# WE# RESET# BYTE# WP#/ACC A0-AM P/N:PM1208 MX29LV640D T/B CONTROL PROGRAM/ERASE INPUT HIGH VOLTAGE LOGIC ADDRESS FLASH ARRAY LATCH AND BUFFER Y-PASS GATE PGM SENSE DATA AMPLIFIER PROGRAM DATA LATCH Q0-Q15/A-1 I/O BUFFER AM: MSB address ...
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... Table 1. BLOCK STRUCTURE MX29LV640DT SECTOR GROUP ARCHITECTURE Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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MX29LV640DB SECTOR GROUP ARCHITECTURE Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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Table 2. BUS OPERATION--1 Mode Select RE- SET# Device Reset L Standby Mode Vcc± 0.3V Output H Disable Read Mode H Write(Note1) H Accelerate H Program Temporary Vhv Sector-Group Unprotect Sector-Group Vhv Protect (Note2) Chip Vhv Unprotect (Note2) Notes: ...
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... BUS OPERATION--2 Item Control Input CE# Sector Lock Status L Verification Read Silicon ID L Manufacturer Code Read Silicon ID L MX29LV640DT Read Silicon ID L MX29LV640DB Read Indicator Bit L (Q7) For Security Sector Notes: 1. Sector unprotected code:00h. Sector protected code:01h. 2. Factory locked code: Factory unlocked code: 3 ...
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WRITE COMMANDS/COMMAND SEQUENCES To write a command to the device, system must drive WE# and CE# to Vil, and OE# to Vih command cycle, all address are latched at the later falling edge of CE# and WE#, ...
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RESET# OPERATION Driving RESET# pin low for a period more than Trp will reset the device back to read mode. If the device is in program or erase operation, the reset operation will take at most a period of ...
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... When ViL is asserted on WP#/ACC pin, the two boot sectors are protected regardless of the previous state of protec- tion implemented by aforementioned Sector Group Protect/Chip Unprotect. For MX29LV640DT, the two outermost sectors are the two boot sectors of the highest addresses. For MX29LV640DB, the two outermost sectors are the two boot sectors of the lowest addresses. Note that the WP#/ACC should be either Vhv, Vih, or Vil, and must not be floated or unconnected ...
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Customer Lockable: Security Sector NOT Programmed or Protected at the Factory When the security feature is not required, the security region can act as an extra memory space. Security silicon sector can also be protected by two methods. Note ...
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POWER-UP WRITE INHIBIT When WE#, CE# is held at Vil and OE# is held at Vih during power up, the device ignores the first command on the rising edge of WE#. POWER SUPPLY DECOUPLING A 0.1uF capacitor should be ...
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TABLE 3. MX29LV640D T/B COMMAND DEFINITIONS Read Mode Command 1st Bus Cyc Addr Addr Data Data 2nd Bus Cyc Addr Data 3rd Bus Cyc Addr Data 4th Bus Cyc Addr Data 5th Bus Cyc Addr Data 6th Bus Cyc ...
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RESET In the following situations, executing reset command will reset device back to read array mode: • Among erase command sequence (before the full command set is completed) • Sector erase time-out period • Erase fail (while Q5 is ...
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AUTOMATIC PROGRAMMING The MX29LV640D T/B can provide the user program function by the form of Byte-Mode or Word-Mode. As long as the users enter the right cycle defined in the Table.3 (including 2 unlock cycles and A0H), any data ...
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CHIP ERASE Chip Erase is to erase all the data with "1" and "0" as all "1". It needs 6 cycles to write the action in, and the first two cycles are "unlock" cycles, the third one is a ...
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RY/BY# is open drain output pin and should be weakly connected to VDD through a pull-up resistor. 3. When an attempt is made to erase a protected sector, Q7 will output its complement data or Q6 continues to ...
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QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX29LV640D T/B features CFI mode. Host system can retrieve the operating characteristics, structure and vendor- specified information such as identifying information, memory size, byte/word configuration, operating voltages and timing information of ...
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Table 4-3. CFI Mode: Device Geometry Data Values Description Device size = number of bytes Flash device interface description (02=asynchronous x8/x16) Maximum number of bytes in buffer write = 2 Number of erase regions within device ...
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Table 4-4. CFI Mode: Primary Vendor-Specific Extended Query Data Values Description Query - Primary extended table, unique ASCII string, PRI Major version number, ASCII Minor version number, ASCII Unlock recognizes address (0= recognize, 1= don't recognize) Erase suspend (2= ...
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ABSOLUTE MAXIMUM STRESS RATINGS Surrounding Temperature with Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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DC CHARACTERISTICS Symbol Description Iilk Input Leak Iilk9 A9 Leak Iolk Output Leak Icr1 Read Current(5MHz) Icr2 Read Current(1MHz) Icw Write Current Isb Standby Current Isbr Reset Current Isbs Sleep Mode Current Icp1 Accelerated Pgm Current, WP#/Acc pin(Word/Byte) Icp2 ...
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SWITCHING TEST CIRCUITS 0.1uF Test Condition Output Load : 1 TTL gate Output Load Capacitance,CL : 30pF Rise/Fall Times : 5ns In/Out reference levels :1.5V SWITCHING TEST WAVEFORMS 3.0V 0.0V P/N:PM1208 MX29LV640D T/B Vcc TESTED DEVICE CL R1 1.5V ...
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AC CHARACTERISTICS Symbol Description Taa Valid data output after address Tce Valid data output after CE# low Toe Valid data output after OE# low Tdf Data output floating after OE# high (*Note 1) Toh Output hold time from the ...
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Figure 1. COMMAND WRITE OPERATION CE# Vih Vil Vih WE# Vil OE# Vih Vil Vih Addresses Vil Vih Data Vil P/N:PM1208 MX29LV640D T/B Tcwc Tcs Tch Toes Twp VA Tah Tas Tdh Tds DIN VA: Valid Address 32 Twph ...
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READ/RESET OPERATION Figure 2. READ TIMING WAVEFORMS Vih CE# Vil Vih WE# Vil Vih OE# Vil Vih Addresses Vil HIGH Z Voh Outputs Vol P/N:PM1208 MX29LV640D T/B Tce Toeh Toe Toh Taa Trc ADD Valid DATA Valid 33 Tdf ...
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AC CHARACTERISTICS Item Description Trp1 RESET# Pulse Width (During Automatic Algorithms) Trp2 RESET# Pulse Width (NOT During Automatic Algorithms) Trh RESET# High Time Before Read Trb1 RY/BY# Recovery Time (to CE#, OE# go low) Trb2 RY/BY# Recovery Time (to ...
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ERASE/PROGRAM OPERATION Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM CE# WE# OE# Address Data RY/BY# P/N:PM1208 MX29LV640D T/B Tch Twp Twph Tcs Tghwl Last 2 Erase Command Cycle Twc Tah Tas 2AAh SA Tds Tdh 55h 10h Tbusy SA: ...
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Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM1208 MX29LV640D T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H ...
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Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM CE# WE# Tcs Tghwl OE# Last 2 Erase Command Cycle Twc 2AAh Address Data RY/BY# P/N:PM1208 MX29LV640D T/B Tch Twp Twph Tbal Tas Sector Sector Address 0 Address 1 Tah Tds Tdh ...
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Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM1208 MX29LV640D T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H ...
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Figure 8. ERASE SUSPEND/RESUME FLOWCHART P/N:PM1208 MX29LV640D T/B START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H ERASE RESUME Continue Erase ...
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Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS CE# WE# OE# Address Data RY/BY# Figure 10. Accelerated Program Timing Diagram (9.5V ~ 10.5V) Vhv WP#/ACC Vil or Vih P/N:PM1208 MX29LV640D T/B Tch Twp Tcs Twph Tghwl Last 2 Program Command Cycle ...
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Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM WE# CE# OE# Address Data RY/BY# P/N:PM1208 MX29LV640D T/B Tcep Tceph Tghwl Tah Tas 555h PA Tdh Tds A0h PD Tbusy 41 Twhwh1 or Twhwh2 VA VA Status DOUT REV. 1.6, AUG. ...
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Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART next address P/N:PM1208 MX29LV640D T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data# Polling Algorithm or Toggle Bit Algorithm No Read ...
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SECTOR GROUP PROTECT/CHIP UNPROTECT Figure 13. SECTOR GROUP PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control) CE# WE# OE# Data SA, A6 A1, A0 Vhv Vih RESET# P/N:PM1208 MX29LV640D T/B 150uS: Sector Protect 1us 15mS: Chip Unprotect 60h 60h VA VA: valid ...
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Figure 14-1. IN-SYSTEM SECTOR GROUP PROTECT WITH RESET#=Vhv P/N:PM1208 MX29LV640D T/B START Retry count=0 RESET#=Vhv Wait 1us Temporary Unprotect Mode No First CMD=60h? Yes Write Sector Address with [A6,A1,A0]:[0,1,0] data: 60h Wait 150us Write Sector Address with [A6,A1,A0]:[0,1,0] data: ...
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Figure 14-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv P/N:PM1208 MX29LV640D T/B START Retry count=0 RESET#=Vhv Wait 1us Temporary Unprotect No First CMD=60h? Yes All sectors protected? Yes Write [A6,A1,A0]:[1,1,0] data: 60h Wait 15ms Write [A6,A1,A0]:[1,1,0] data: 40h Retry Count +1 ...
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Table 5. TEMPORARY SECTOR GROUP UNPROTECT Parameter Alt Description Trpvhh Tvidr RESET# Rise Time to Vhv and Vhv Fall Time to RESET# Tvhhwl Trsp RESET# Vhv to WE# Low Figure 15. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS CE# WE# RY/BY# ...
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Figure 16. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART Notes: 1. Temporary unprotect all protected sectors Vhv=9.5~10.5V. 2. After leaving temporary unprotect mode, the previously protected sectors are again protected. P/N:PM1208 MX29LV640D T/B Start Apply Reset# pin Vhv Volt Enter Program ...
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Figure 17. SILICON ID READ TIMING WAVEFORM Vih CE# Vil Vih WE# Vil Vih OE# Vil Vhv Vih A9 Vil Vih A0 Vil Vih A1 Vil Vih ADD Vil DATA Vih Q0-Q7 (Byte Mode) Vil DATA Vih Q0-Q15/A-1 (Word ...
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WRITE OPERATION STATUS Figure 18. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) CE# Tch WE# OE# Toeh Address Q7 Q0-Q6 Tbusy RY/BY# P/N:PM1208 MX29LV640D T/B Tce Toe Tdf Trc VA Taa Toh Complement Status Data Status Data Status Data ...
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Figure 19. DATA# POLLING ALGORITHM Notes: 1. For programming, valid address meas program address. For erasing, valid address meas erase sectors address should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1208 MX29LV640D T/B ...
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Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) CE# Tch WE# OE# Toeh Address Q6/Q2 Tbusy RY/BY# P/N:PM1208 MX29LV640D T/B Tce Toe Tdf Trc VA VA Taa Toh Valid Status Valid Status (second read) (first read ...
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Figure 21. TOGGLE BIT ALGORITHM Notes: 1. Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM1208 MX29LV640D T/B Start Read Q7-Q0 ...
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AC CHARACTERISTICS WORD/BYTE CONFIGURATION (BYTE#) Parameter Description Telfl/Telfh CE# to BYTE# from L/H Tflqz BYTE# from L to Output Hiz Tfhqv BYTE# from H to Output Active Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte ...
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RECOMMENDED OPERATING CONDITIONS At Device Power-Up AC timing illustrated in Figure A is recommended for the supply voltages and the control signals at device power-up. If the timing in the figure is ignored, the device may not operate correctly. ...
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ERASE AND PROGRAMMING PERFORMANCE PARAMETER Chip Erase Time Sector Erase Time Erase/Program Cycles Chip Programming Time Accelerated Byte/Word Program Time Word Program Time Byte Programming Time Notes: 1. Typical program and erase times assume the following conditions: 25° C, ...
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... ORDERING INFORMATION PART NO. MX29LV640DTMC-90G MX29LV640DBMC-90G MX29LV640DTTC-90G MX29LV640DBTC-90G MX29LV640DTXEC-90G MX29LV640DBXEC-90G MX29LV640DTXEI-90G MX29LV640DBXEI-90G MX29LV640DTTI-90G MX29LV640DBTI-90G * 44-pin SOP is only for Pachinko Socket P/N:PM1208 MX29LV640D T/B ACCESS TIME Ball Pitch/ (ns) Ball size 0.8mm/0.4mm 90 0.8mm/0.4mm 90 0.8mm/0.4mm 90 0.8mm/0.4mm PACKAGE Remark ...
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PART NAME DESCRIPTION P/N:PM1208 MX29LV640D T/B 640 OPTION: G: Lead-free package SPEED: 90: 90ns TEMPERATURE RANGE: C: Commercial (0˚C to 70˚C) I: Industrial (-40˚C to 85˚C) PACKAGE: M:SOP T: TSOP ...
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PACKAGE INFORMATION P/N:PM1208 MX29LV640D T/B 58 REV. 1.6, AUG. 16, 2008 Datasheet pdf - http://www.DataSheet4U.net/ ...
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P/N:PM1208 MX29LV640D T/B 59 REV. 1.6, AUG. 16, 2008 Datasheet pdf - http://www.DataSheet4U.net/ ...
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P/N:PM1208 MX29LV640D T/B 60 REV. 1.6, AUG. 16, 2008 Datasheet pdf - http://www.DataSheet4U.net/ ...
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REVISION HISTORY Revision No. Description 1.0 1. Modified Tvcs from 50us(Min.) to 100us(Min.) 2. Modified latch-up protected to 250mA-->100mA 3. Modified latch-up characteristics 4. Modified sector erase resume section ...should be a 400us-->4ms P24 5. Modified "sector erase time" ...
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... Koningin Astridlaan 59, Bus 1 1780 Wemmel Belgium Tel: +32-2-456-8020 Fax: +32-2-456-8021 Singapore Office Macronix Pte. Ltd. 1 Marine Parade Central #11-03 Parkway Centre Singapore 449408 Tel: +65-6346-5505 Fax: +65-6348-8096 MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 62 Datasheet pdf - http://www.DataSheet4U.net/ ...