U4080B TEMIC Semiconductors, U4080B Datasheet - Page 2

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U4080B

Manufacturer Part Number
U4080B
Description
Voice-Switched Circuit for Handsfree Operation
Manufacturer
TEMIC Semiconductors
Datasheet

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Pin Description
U4080B
2 (15)
Pin
10
11
12
13
1
2
3
4
5
6
7
8
9
Symbol
MICO
RLO
RTG
TLO
MIC
CP1
CP2
RLI
TDI
TLI
TO
R1
TI
Load resistance.
Provides reference current for the
transmit and receive attenuators.
Transmit attenuator nominal gain
resistor.
Transmit channel gain is inversely
proportional to the resistance RTG
connected to Pin 2.
Transmit attenuator input.
Input resistance is 5 k
Transmit attenuator output.
Drives the input of the transmit level
detector and the external circuit which
drives the telephone line.
Transmit level detector input.
Sets the detector level. Sensitivity to
transmit channel signals increases
when the value of the resistor
decreases.
Transmit level detector output.
The external RC-element sets the time
the comparator will hold the system in
the transmit mode after speech ceases.
Receive level detector input.
An external resistance connected to the
pin sets the detection level. Sensitivity
to receive channel signals increases
when the resistor decreases.
Receive level detector output.
RC-element connected at the pin sets
the time the comparator will hold the
system in the receive mode after the
receive signal expires.
Microphone amplifier input.
Input impedance is 10 k and the bias
voltage is approximately equal to V
Microphone amplifier output.
Gain is set internally at 34 dB
(50 V/V).
RC circuit for holding background
noise level.
The transmit detector compares the
CP1 voltage with the speech signal
from CP2.
Capacitor for detecting the speech
signal for comparison with the
background noise held at Pin 11 (CP1).
Transmit detector input.
The microphone amplifier output is
coupled to the TDI pin through an
external resistor.
Function
Preliminary Information
B.
Pin
14
15
16
17
18
19
20
21
22
23
24
25
Symbol
GND1
GND2
AGC
VCC
TDO
SAO
ACF
SAI
VCI
V+
CS
V
B
High current ground pin for the speaker
amplifier output stage.
GND1 voltage should be within 10 mV
of the ground voltage of Pin 22.
Speaker amplifier output.
It will source and sink up to 100 mA
when ac coupled to the speaker. Gain is
set internally at 34 dB (50 V/V).
DC supply.
A capacitor from this pin to V
stabilizes the speaker amplifier gain
control loop, and additionally controls
the attack and decay time of this
circuit. The gain control loop limits the
speaker amp input to prevent clipping
at SAO. The internal resistance at the
AGC pin is nominally 110 k .
Digital chip select input.
Logic O: VCC regulator is enabled
when
drawing 0.5 mA when
Speaker amplifier input.
Input impedance is ca. 20 k .
Regulated output voltage (5.4 V).
It powers all circuits except the speaker
amplifier output. This voltage can be
used for an external circuit i.e., a
microprocessor where a filter capacitor
is required.
Output voltage.
V
as an analog ground to the speaker-
phone system.
Integrated circuit ground
(except for the speaker amplifier).
Transmit detector output.
An external RC circuit holds the
system in the transmit mode during
pauses between words or phrases.
Volume control input.
A variable resistor connected to this
pin provides receive mode volume
control.
Attenuator control filter.
A connected capacitor reduces noise
transients as the attenuator control
switches levels of attenuation.
B
is approximately VCC/2 and serves
TELEFUNKEN Semiconductors
x
0.7 V; Logic 1: Standby mode
Function
Rev. A1, 20-May-96
y
1.6 V
B

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