74LCX74M Fairchild Semiconductor, 74LCX74M Datasheet

74LCX74M

Manufacturer Part Number

74LCX74M

Description

IC FLIP FLOP LV DUAL D 14-SOIC

Manufacturer

Fairchild Semiconductor

Series

74LCXr

Type

D-Typer

Datasheets

1.74LCX74MTC.pdf (13 pages)

2.74LCX74M.pdf (11 pages)

Specifications of 74LCX74M

Function

Set(Preset) and Reset

Output Type

Differential

Number Of Elements

Number Of Bits Per Element

Frequency - Clock

150MHz

Delay Time - Propagation

7ns

Trigger Type

Positive Edge

Current - Output High, Low

24mA, 24mA

Voltage - Supply

2 V ~ 3.6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

14-SOIC (3.9mm Width), 14-SOL

Number Of Circuits

Logic Family

74LC

Logic Type

D-Type Edge Triggered Flip-Flop

Polarity

Inverting/Non-Inverting

Input Type

Single-Ended

Propagation Delay Time

8 ns

High Level Output Current

- 24 mA

Low Level Output Current

24 mA

Supply Voltage (max)

3.6 V

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

Minimum Operating Temperature

- 40 C

Supply Voltage (min)

2 V

Flip-flop Type

Propagation Delay

7ns

Frequency

150MHz

Output Current

24mA

Ic Output Type

Complementary

Supply Voltage Range

2V To 3.6V

Logic Case Style

SOIC

Rohs Compliant

Yes

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Company

Part Number

Manufacturer

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Price

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Current page: 1 of 11
Download datasheet (529Kb)

74LCX74M

74LCX74MX_NL

(Note 2)

74LCX74SJ

74LCX74BQX

(Note 1)

74LCX74MTC

74LCX74MTCX_NL

(Note 2)

74LCX74

Low Voltage Dual D-Type Positive

Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description

The LCX74 is a dual D-type flip-flop with Asynchronous

Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on the

positive edge of the clock pulse. After the Clock Pulse input

threshold voltage has been passed, the Data input is

locked out and information present will not be transferred to

the outputs until the next rising edge of the Clock Pulse

input.

Asynchronous Inputs:

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: DQFN package available in Tape and Reel only.

Note 2: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Order Number

LOW input to S

LOW input to C

Clear and Set are independent of clock

Simultaneous LOW on C

Q HIGH

(Set) sets Q to HIGH level

(Clear) sets Q to LOW level

MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC

Package

Number

MTC14

M14D

M14A

and S

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MO-241, 2.5 x 3.0mm

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

makes both Q and

DS012414

Features

5V tolerant inputs

2.3V–3.6V V

7.0 ns t

Power down high impedance inputs and outputs

Implements patented noise/EMI reduction circuitry

Latch-up performance exceeds JEDEC 78 conditions

ESD performance:

Leadless Pb-Free DQFN package

24 mA output drive (V

Package Description

Human body model

Machine model

max (V

specifications provided

200V

3.3V), 10

2000V

3.0V)

March 1995

Revised February 2005

A I

www.fairchildsemi.com

max

Related parts for 74LCX74M

74LCX74M Summary of contents

Page 1

... MO-241, 2.5 x 3.0mm 74LCX74MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX74MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm (Note 2) Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Logic Symbols IEEE/IEC Pin Descriptions Pin Names Description Data Inputs Clock Pulse Inputs Direct Clear Inputs Direct Set Inputs ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 4

AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PHL PLH Propagation Delay PHL PLH ...

Page 5

AC Loading and Waveforms ( PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay, Pulse Width and t rec 3-STATE Output High Enable and Disable TImes for Logic (Input Pulse Characteristics 1MHz, ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Tape and Reel Specification Tape Format for DQFN Package Tape Designator Section Leader (Start End) BQX Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) REEL DIMENSIONS inches (millimeters) Tape Size A B 13.0 0.059 12 mm (330) (1.50) Number Cavity ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow www.fairchildsemi.com Package Number M14A 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm www.fairchildsemi.com Package Number MLP014A 10 ...

Page 11

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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