74LCX821MTCX Fairchild Semiconductor, 74LCX821MTCX Datasheet

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74LCX821MTCX

Manufacturer Part Number
74LCX821MTCX
Description
IC FLIP FLOP 10BIT D LV 24TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Type
D-Type Busr
Datasheet

Specifications of 74LCX821MTCX

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
10
Frequency - Clock
150MHz
Delay Time - Propagation
7ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2001 Fairchild Semiconductor Corporation
74LCX821WM
74LCX821MSA
74LCX821MTC
74LCX821
Low Voltage 10-Bit D-Type Flip-Flop
with 5V Tolerant Inputs and Outputs
General Description
The LCX821 consists of ten D-type Flip-Flops with
3-STATE outputs for bus organized system applications.
The device is designed for low voltage (2.5V or 3.3V) V
applications with capability of interfacing to a 5V signal
environment.
The LCX821 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.
Logic Symbols
Order Number
Package Number
MSA24
MTC24
IEEE/IEC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS012635
CC
Features
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
resistor is determined by the current-sourcing capability of the driver.
Connection Diagram
5V tolerant inputs and outputs
2.3V–3.6V V
7.0 ns t
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
24 mA output drive (V
Human Body Model
Machine Model
Package Description
PD
max (V
CC
CC
through a pull-up resistor: the minimum value or the
specifications provided
CC
200V
3.3V), 10 A I
CC
2000V
3.0V)
January 1996
Revised March 2001
CC
www.fairchildsemi.com
max

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74LCX821MTCX Summary of contents

Page 1

... Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code. Logic Symbols IEEE/IEC © 2001 Fairchild Semiconductor Corporation Features 5V tolerant inputs and outputs 2.3V–3.6V V ...

Page 2

Pin Descriptions Pin Names Description D –D Data Inputs 0 9 CLK Clock Input OE Output Enable Input O –O 3-STATE Latch Outputs 0 9 Functional Description The LCX821 consists of ten edge-triggered flip-flops with individual D-type inputs with 3-STATE ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 4

DC Electrical Characteristics Symbol Parameter I Quiescent Supply Current CC I Increase in I per Input CC CC Note 5: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PHL t ...

Page 5

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number M24B Package Number MSA24 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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