ds2154lnd2 Maxim Integrated Products, Inc., ds2154lnd2 Datasheet - Page 69

Manufacturer Part Number

ds2154lnd2

Description

Ds2154 Enhanced E1 Single Chip Transceiver

Manufacturer

Maxim Integrated Products, Inc.

Datasheet

1.DS2154LND2.pdf (87 pages)

14 TIMING DIAGRAMS

Figure 14-1. Receive Side Timing

Figure 14-2. Receive Side Boundary Timing (with Elastic Store Disabled)

NOTE 1: RCHBLK IS PROGRAMMED TO BLOCK CHANNEL 2.

NOTE 2: RLCLK IS PROGRAMMED TO PULSE HIGH DURING THE Sa4 BITS POSITION.

NOTE 3: SHOWN IS A NON-ALIGN FRAME BOUNDARY.

NOTE 4: RSIG NORMALLY CONTAINS THE CAS MULTIFRAME ALIGNMENT NIBBLE (0000) IN CHANNEL 1.

NOTE 1: RSYNC IN THE FRAME MODE (RCR1.6 = 0).

NOTE 2: RSYNC IN THE FRAME MODE (RCR1.6 = 0).

NOTE 3: RSYNC IS PROGRAMMED TO PULSE HIGH DURING THE Sa4 BIT POSITION.

NOTE 4: RLINK WILL ALWAYS OUTPUT ALL FIVE Sa BITS AS WELL AS THE REST OF THE RECEIVE DATASTREAM.

NOTE 5: THIS DIAGRAM ASSUMES THE CAS MF BEGINS WITH THE FAS WORD.

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