mp8798 Exar Corporation, mp8798 Datasheet
mp8798
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mp8798 Summary of contents
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... The power consumption during the power down mode REF1(–). is approximately 3mW Specified for operation over the commercial / industrial (–40 and REF(+) to +85 C) temperature range, the MP8798 is available in plastic dual-in-line (PDIP), surface mount (SOIC), and shrink small outline (SSOP) packages. Temperature DNL Range Part No. (LSB) – ...
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... MP8798 SIMPLIFIED BLOCK AND TIMING DIAGRAM Coarse Comparators REF(+) 1 REF(–) V REF1(–) PD Ladder S A IN1 A IN2 IN3 MUX A IN4 Decoder 4 PIN CONFIGURATIONS See Packaging Section for Package Dimensions 1 DB3 DB4 2 DB5 3 4 DB6 5 DB7 6 DGND ...
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... IN4 23 AGND Analog Ground 24 AV Analog Power Down 26 DB0 Data Output Bit 0 (LSB) 27 DB1 Data Output Bit 1 28 DB2 Data Output Bit SELECTED ANALOG INPUT IN1 IN2 IN3 IN4 X X Previous selection 3 MP8798 DESCRIPTION DD ...
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... MP8798 ELECTRICAL CHARACTERISTICS TABLE Unless Otherwise Specified 4. AGND REF(+) REF(–) A Parameter Symbol KEY FEATURES Resolution Sampling Rate ACCURACY Differential Non-Linearity DNL Integral Non-Linearity INL Zero Scale Error EZS Full Scale Error EFS REFERENCE VOLTAGES Positive Ref. Voltage ...
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... Specified values guarantee functional device. Refer to other parameters for accuracy. 6 System can clock MP8798 with any duty cycle as long as all timing conditions are met. 7 Input range where input is converted correctly into binary code. Input voltage outside specified range converts to zero or full scale output ...
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... Figure 1. MP8798 Timing Diagram THEORY OF OPERATION Analog-to-Digital Conversion The MP8798 converts analog voltages into 1024 digital codes by encoding the outputs of 15 coarse and 67 fine compa- rators. Digital logic is used to generate the overflow bit. The con- version is synchronous with the clock and it is accomplished in 2 clock periods ...
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... V ZS DIGITAL CODES 0.5 LSB E ZS 001 000 V V001 REF(–) Figure 6. Real A/D Transfer Curve Figure 6. shows the zero scale and full scale error terms. 7 MP8798 DNL LSB V (N+ – 1 – V (N+1) (N) – 1024 REF(+) REF(– – ...
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... Figure 9. Analog Input Equivalent Circuit Rev. 3.00 A system will clock the MP8798 continuously or it will give clock pulses intermittently when a conversion is desired. The timing of Figure 8a shows normal operation, while the timing of Figure 8b keeps the MP8798 in balance and ready to sample the analog input. CLOCK N DATA ...
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... A system can increase total gain by reducing V Rev. 3.00 Digital Interfaces The logic encodes the outputs of the comparators into a bi- nary code and latches the data in a D-type flip-flop for output. The functional equivalent of the MP8798 ( Figure 12 com- Sample M+1 posed of: 1) Delay stage ( ...
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... MP8798 Power Down Figure 13. shows the relationship between the clock, sampled A to output data relationship and the effect of power IN down. CLK SAMPLE DB0-DB9 N-2 Valid REF(+) Figure 13. Power Down Timing Diagram Rev. 3.00 SAMPLE M Ç Ç Ç Ç Ç Ç ...
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... All MP8798 inputs have input pro- tection diodes which will protect the device from short tran- sients outside the supply ranges. 3. The design board will affect the accuracy of MP8798. Use of wire wrap is not recommended. 4. The analog input signal (V ...
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... MP8798 0.1 F 100k Figure 15. Example of a Reference Voltage Source – For use Beckman Instruments #694-3-R10k resistor array or equivalent. NOTE: High R values affect the input BW of ADC due to the (R C applications the R value needs to be selected as a tradeoff between A ...
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... Power Down write values to DAC DAC 4 to minimize power consumption. Figure 18. A/D Ladder and A Rev. 3.00 MP8798 A IN DAC8 IN1 A DAC7 IN IN2 DAC6 A IN IN3 A DAC5 IN IN4 V DAC4 REF(+) 1/2 DAC3 V REF(+) DAC1 DAC MP7641 V REF1(–) Only A and Ladder detail shown. IN with Programmed Control IN ( 1/2 TAP.) REF(+), REF(–), 13 MP8798 ...
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... MP8798 PERFORMANCE CHARACTERISTICS Graph 1. DNL vs. Sampling Frequency Graph 3. Supply Current vs. Sampling Frequency Graph 5. DNL vs. Reference Voltage Rev. 3.00 Graph 2. INL vs. Sampling Frequency Graph 4. Power Down Current vs. Sampling Frequency Graph 6. DNL vs. Temperature 14 ...
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... Graph 7. Supply Current vs. Temperature Graph 9. Reference Resistance vs. Rev. 3.00 Graph 8. Power Down Current vs. Temperature Temperature 15 MP8798 ...
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... MP8798 28 LEAD PLASTIC DUAL-IN-LINE Seating Plane L B SYMBOL Note: Rev. 3.00 (300 MIL PDIP) NN28 INCHES MILLIMETERS MIN MAX MIN 0.130 0.230 3.30 0.015 –– 0.381 0.014 0.023 ...
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... MIN MAX MIN MAX 0.097 0.104 2.464 2.642 0.0050 0.0115 0.127 0.292 0.014 0.019 0.356 0.483 0.0091 0.0125 0.231 0.318 0.701 0.711 17.81 18.06 0.292 0.299 7.42 0.050 BSC 1.27 BSC 0.400 0.410 10.16 10.41 0.010 0.016 0.254 0.406 0.016 0.035 0.406 0.889 MP8798 A L 7.59 8 ...
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... MP8798 28 LEAD SHRINK SMALL OUTLINE PACKAGE 28 1 Seating Plane e Rev. 3.00 (SSOP) A28 MILLIMETERS SYMBOL MIN MAX MIN A 1.73 2.05 0.068 A 0.05 0.21 0.002 1 B 0.20 0.40 0.008 C 0.13 0.25 0.005 D 10.07 10.40 0.397 E 5.20 5.38 0.205 e 0.65 BSC 0.0256 BSC H 7.65 8.1 0.301 L 0.45 0.95 0.018 INCHES MAX 0.081 0.008 0.016 ...
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... Rev. 3.00 Notes 19 MP8798 ...
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... MP8798 EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im- prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de- scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contains here in are only for illustration purposes and may vary depending upon a user’ ...