upd7566a Renesas Electronics Corporation., upd7566a Datasheet - Page 24

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upd7566a

Manufacturer Part Number
upd7566a
Description
4-bit Single-chip Microcomputer
Manufacturer
Renesas Electronics Corporation.
Datasheet
24
Caution The STOP mode is not released by setting the test request flags.
3.4
execution is resumed, starting from the instruction next to the HALT instruction.
affected by the release of the HALT mode.
3.5
HALT mode is released. Ordinary resetting operation is then accomplished. Then, the program is executed starting
from address 0.
However, the contents of the registers are affected and become undefined.
The HALT is released when either or both of the test request flags (INTT RQF and INT0 RQF) are set, and program
The contents of the registers and data memory, which have been retained during the HALT mode, are not
When the RESET signal is input, the HALT mode is unconditionally released, as illustrated in Fig. 3-2.
While the RESET signal is active (high level), the HALT mode continues. When the RESET signal goes low, the
The contents of the data memory, retained during the HALT mode, are not affected by the RESET signal.
RELEASING HALT MODE BY USING TEST REQUEST FLAGS
RELEASING HALT MODE BY USING RESET INPUT
RESET input
STOP instruction
RESET
Fig. 3-2 HALT Mode Release Timing by RESET Input
STOP mode
Fig. 3-1 STOP Mode Release Timing
HALT mode
(oscillator stabilization time)
Clock oscillation starts
HALT mode
Released
Ordinary reset operation
(execution starts from
address 0)
Released
Ordinary reset operation
(execution starts from
address 0)
PD7566A, 7566A(A)

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