74LV374D,112 NXP Semiconductors, 74LV374D,112 Datasheet - Page 4

• Manufacturer Part Number: 74LV374D,112
• Description: IC OCT D FF POS-EDG TRIG 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74LVr
• Type: D-Type Busr

Specifications of 74LV374D,112

• Function: Standard
• Output Type: Tri-State Non Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 20MHz
• Delay Time - Propagation: 24ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 12mA, 12mA
• Voltage - Supply: 1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LV374D; 74LV374D; 935063270112

NXP Semiconductors
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
74LV374_2
Product data sheet
Operating mode
Load and read register
Load register and disable
outputs
Symbol
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
tot
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW to HIGH CP transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the LOW to HIGH CP transition
Z = high-impedance OFF-state
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP20 packages: above 70 C the value of P
For SO20 packages: above 70 C the value of P
For (T)SSOP20 packages: above 60 C the value of P
= LOW to HIGH clock transition
Function table
Limiting values
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
[1]
Input
OE
L
L
H
H
tot
tot
CP
Conditions
V
V
V
T
derates linearly with 8 mW/K.
derates linearly with 12 mW/K.
amb
I
O
O
Rev. 02 — 14 May 2009
DIP20
SO20, SSOP20 and TSSOP20
< 0.5 V or V
tot
< 0.5 V or V
= 0.5 V to (V
= 40 C to +125 C
derates linearly with 5.5 mW/K.
Octal D-type flip-flop; positive edge-trigger; 3-state
I
O
> V
CC
Dn
l
h
l
h
> V
CC
+ 0.5 V)
CC
+ 0.5 V
+ 0.5 V
Internal flip-flop Output
L
H
L
H
[1]
[1]
[2]
Min
-
-
-
-
-
-
0.5
70
65
© NXP B.V. 2009. All rights reserved.
74LV374
Qn
L
H
Z
Z
Max
+7.0
70
-
+150
750
500
20
50
35
Unit
V
mA
mA
mA
mA
mA
mW
mW
C
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