si5321 Silicon Laboratories, si5321 Datasheet - Page 32

• Manufacturer Part Number: si5321
• Description: Sonet/sdh Precision Clock Multiplier Ic
• Manufacturer: Silicon Laboratories

Si5321
6. 9x9 mm PBGA Card Layout
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
32
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1.
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components.
be 60 µm minimum, all the way around the pad.
paste release.
Symbol
C1
C2
E1
E2
X
0.40
Min
Rev. 2.4
Nom
0.45
7.00
7.00
1.00
1.00
Max
0.50