sc286ultrt Semtech Corporation, sc286ultrt Datasheet - Page 13

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sc286ultrt

Manufacturer Part Number
sc286ultrt
Description
Dual Channel 4a Synchronous Step-down Regulator
Manufacturer
Semtech Corporation
Datasheet
Applications Information
Detailed Description
The SC286 is a two channel synchronous step-down PWM
(Pulse Width Modulated), DC-DC converter utilizing a
1.6MHz fixed-frequency voltage mode architecture. Both
channels are designed to operate in fixed-frequency PWM
mode and will enter PSAVE (power save) mode at light
loads to maximize efficiency. The switching frequency is
chosen to minimize the size of the external inductor and
capacitors while maintaining high efficiency. Both chan-
nels run independently
Operation
During normal operation, the PMOS MOSFET is activated
on each rising edge of the internal oscillator. The period is
set by the onboard oscillator when in PWM mode. The
device has an internal synchronous NMOS rectifier and
does not require a Schottky diode on the LX pin. The device
operates as a buck converter in PWM mode with a fixed fre-
quency of 1.6MHz at medium to high loads. At light loads
the part will enter PSAVE mode to maximize efficiency.
Power Save Mode Operation
When the load current decreases below the PSAVE thresh-
old, PWM switching stops and each channel automatically
enters PSAVE mode. This threshold varies depending upon
the input voltage and output voltage setting, optimizing
efficiency for all possible load currents. While in PSAVE
mode, output voltage regulation is controlled by a series of
bursts in switching. During a burst, the inductor current is
limited to a peak value which controls the on-time of the
PMOS switch. After reaching this peak, the PMOS switch is
disabled and the inductor current is forced to near 0mA.
Switching bursts continue until the output voltage climbs
to V
Switching is then stopped to eliminate switching losses,
enhancing overall efficiency. Switching resumes when the
output voltage reaches the lower threshold of V
continues until the upper threshold again is reached. Note
that the output voltage is regulated hysteretically while in
PSAVE mode between V
duty cycle while in PSAVE mode are solely determined by
V
switching frequency being much lower than the PWM
mode frequency.
IN
and V
OUT
+2% or until the PSAVE current limit is reached.
OUT
until PWM mode resumes. This can result in the
OUT
and V
OUT
+ 2%. The period and
OUT
and
If the output load current increases enough to cause V
to decrease below the PSAVE exit threshold (V
device automatically exits PSAVE and operates in continu-
ous PWM mode. Note that the PSAVE high and low thresh-
old levels are both set at or above V
undershoot when the SC286 exits PSAVE. Figure 1 illus-
trates the transitions from PWM mode to PSAVE mode and
back to PWM mode.
Protection Features
The SC286 provides the following protection features for
each independent channel:
Current Limit & OCP
The internal PMOS power device in the switching stage for
each channel is protected by a current limit feature. If the
inductor current is above the PMOS current limit for 16
consecutive cycles, the part enters foldback current limit
mode and the output current is limited to the current limit
holding current
Figure 1 — Transitions between PWM and PSAVE Modes
Demand
V
(I
V
Load
OUT
OUT
OUT
V
V
Current Limit
Over-Voltage Protection
Soft-Start Operation
Thermal Shutdown
+2%
-4%
OUT
LX
)
Medium / High
PWM Mode at
Load
(I
BURST
CL_HOLD
OFF
PSAVE Mode at
Light Load
) which is approximately 1A.
Time
OUT
PWM Mode at
Medium / High
PSAVE
to minimize
Load
EXIT
OUT
SC286
-4%), the
OUT
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