isl8009a Intersil Corporation, isl8009a Datasheet - Page 3

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isl8009a

Manufacturer Part Number
isl8009a
Description
1.5a Low Quiescent Current 1.6mhz High Efficiency Synchronous Buck Regulator
Manufacturer
Intersil Corporation
Datasheet

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Electrical Specifications
Pin Descriptions
VIN
Input supply voltage. Connect a 10µF ceramic capacitor to
power ground.
EN
Regulator enable pin. Enable the output when driven to high.
Shutdown the chip and discharge output capacitor when driven
to low. Do not leave this pin floating.
POR
2ms timer output. At power-up or EN HI, this output is a 2ms
delayed Power-Good signal for the output voltage. This output
can be reset by a low RSI signal. 2ms starts when RSI goes to
high.
SKIP
Mode Selection pin. Connect to logic high or input voltage VIN
for PFM mode; connect to logic low or ground for forced PWM
mode. Do not leave this pin floating.
LX
Switching node connection. Connect to one terminal of
inductor.
GND
System ground.
Soft-Discharge Resistor
POR
Output Low Voltage
Delay Time
POR Pin Leakage Current
Minimum Supply Voltage for Valid POR Signal
Internal PGOOD Low Rising Threshold
Internal PGOOD Low Falling Threshold
Internal PGOOD High Rising Threshold
Internal PGOOD High Falling Threshold
Internal PGOOD Delay Time
EN, SKIP, RSI
Logic Input Low
Logic Input High
Logic Input Leakage Current
Thermal Shutdown
Thermal Shutdown Hysteresis
PARAMETER
3
Unless otherwise noted, all parameter limits are guaranteed over the recommended operating conditions and the
typical specifications are measured at the following conditions: T
V
page 8. (Continued)
IN
= 5V, L = 2.2µH, C
SYMBOL
1
= C
Enable = 0
Sinking 1mA, VFB = 0.7V
POR = VIN = 3.6V
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Percentage of nominal regulation voltage
Pulled up to 5.5V
2
= 20µF, I
ISL8009A
TEST CONDITIONS
OUT
= 0A to 1.5A, unless otherwise noted. See “Typical Applications” on
VFB
Buck regulator output feedback. Connect to the output through
a resistor divider for adjustable output voltage (ISL8009A-ADJ).
For preset output voltage, connect this pin to the output.
RSI
This input resets the 2ms timer. When the output voltage is
within the PGOOD window, an internal timer is started and
generates a POR signal 2ms later when RSI is low. A high RSI
resets POR and RSI high to low transition restarts the internal
counter if the output voltage is within the window, otherwise the
counter is reset by the output voltage condition.
Exposed Pad
The exposed pad must be connected to the GND pin for proper
electrical performance. The exposed pad must also be
connected to as much as possible for optimal thermal
performance.
A
= +25°C, EN = VIN, RSI = SKIP = 0V,
89.5
MIN
108
104
1.2
1.4
80
85
-
-
-
-
-
-
-
-
TYP
0.01
100
112
107
140
0.1
92
88
50
25
2
-
-
-
-
MAX
94.5
120
114
110
0.3
0.1
0.4
91
1
-
-
-
-
-
-
February 13, 2008
UNITS
FN6656.0
ms
µA
µA
°C
°C
µs
%
%
%
%
:
V
V
V
V

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